As a dedicated VLSI Design and Verification Engineer. Passionate about Semiconductor Design and Verification, eager to Contribute in Technology Developments in VLSI. I have completed my BTech in Electronics and Communication Engineering and done my professional Training in Advanced VLSI Design and Verification from Maven Silicon, where I have gained hands on experience in Verilog, System Verilog and Universal Verification Methodology (UVM).I specialized in RTL design and with a strong foundation in digital circuit design and verification methodologies. This is a quick overview of my skills,•Digital Electronics• Verilog• System Verilog• System Verilog Assertions• Universal Verification Methodology (UVM)Hands-on Experience,• AMBA AHB to APB Bridge Verification• Router 1x3 Design using Verilog and Verification using UVM