John Boatwright Email & Phone Number

Hillsboro Oregon

Prefer fulltime employee work. If that's not available, I can work as a contract electrical engineer until hired on as a full time employee. Skills used are typically related to PCB design, package and die level schematics, simulation and layout. Most recent work has been board design, signal integrity simulation, and FPGA related efforts using Verilog and VHDL. Extensive experience with high speed, analog, and power, including high voltage. A large array of PCBs designed, often with first pass success. The name 'SALAD" derives from: "Schematics, Analysis, Layout, Assembly, and Design".

Hillsboro, Oregon

Data Center server products {through Sumeru, Inc.}, took over for a Sr. Engineer so he could do overall project management tasks. Worked on a Xeon server motherboard design, entering motherboard schematic changes for external customer's server requirements and feature set. Checked PCB signal paths against product design guidelines using Allegro and Cadence Capture. Submitted schematic and layout library change orders, some lab testing of the motherboards after they were manufactured, they worked.

Hillsboro, Oregon

Data Center server products, took over for a Sr. Engineer that needed to work on a high priority project. Worked on approximately 10 new Intel motherboard designs (both internal and external customers), checking that PCB signal paths (DDR4 and other buses) matched product design guidelines using Intel's LCT tools and others such as Allegro, SigXP, HSPICE, & IBIS. All designs worked. Some schematic and layout checking. Submitted software bug reports, scheduled multiple projects and bus work to meet product development milestones.

Hillsboro Oregon

FPGA product line, schematic design of 7 featured evaluation boards, wrote board layout requirements and checked them, wrote user's guides and VHDL or Verilog code for evaluation board demos, along with other board work too. Provided customer case support including: signal integrity simulation using HSPICE, IBIS, and Sigrity, created HSPICE IO kits, customer schematic and layout checking, submitted software bug reports, wrote FAQs, and supporting tech notes.

Beaverton Oregon

10Gbs/s signal path simulations for 6 optical modules, 3 die, 10 PCB’s, and 3 packages (CLK, TXand RX paths). 10Gb/s BGA package simulations with bond wires (up to 450,000 quadratic basis elements). Developed simulation models based on measured S parameter and TDR data. Designed 3 die level cells using the TSMC process.

Hillsboro Oregon

Circuit simulations as well as EM package and layout simulations on three 10 and 40 Gb/s die level products (laser drivers, phase detectors, and mux). 10Gb/s TGBA package simulations. Prior to that, doing applications support for TCD products including the Fibre Channel and OC3/12/48 mux/demux, crosspoint switches, and DACs. Designed 4 PCB evaluation boards and 3 Altera 10K FPGA’s used on them.

Beaverton Oregon

· 1990-1992: Tektronix, Tek Labs, Senior Engineer IV , Picoscope team, responsible for design, layout and turn on of 2 large timebase PCB's (surface mount) for the product. Wrote proposals and did the design, layout and turn on of the ICs (die level design) and test fixtures for: a 500 MHz ECL dual cross point switch IC (200 transistors) and a 250ps to 50ms linear sweep generator IC (500 transistors). Designed 3 Xilinx FPGA’s and a portion of a 4th used on the mother board. Wrote turn on/test software. 12 hour days on average... it was that fun.· 1987-1990: Tektronix, Lab Instruments Division, Engineer III, responsible for design, layout and turn on of the time base PCB for the 11800 and CSA800 sampling oscilloscopes. Design, layout, and turn on of the 3 GHz schmitt trigger selector/preamp IC (200 transistors, the external trigger input goes right into that IC) used in the trigger recognizer.· 1985-1987: Tektronix, Lab Instruments Division, Engineer III, responsible for the design, layout and turn on of 3 PCB's used in the 11A32, 11A34 and 11A52 oscilloscope plug- in amplifiers.· 1983-1985: Tektronix, Lab Instruments Division, Engineer III, responsible for thedesign, layout and turn on of a 500 MHz counter/timer IC (1000 transistors) and a fast rise calibrator, both used in a 11K series oscilloscope. Several other bipolar test IC's (for cell verification) and PCB fixtures.· 1981-1983: Tektronix, Lab Oscilloscopes Product Engineering (LOPE), Engineer II, evaluation engineering group, responsible for testing new products to the engineering specifications and evaluation of instrument modification proposals.US patents: 4,669,098 and 4,749,907

Msee, Electrical Engineering And Solid State

Bsee, Electrical Engineering And Computer Science