John Brummer Email & Phone Number

Santa Clara, CA, US

Participated in the design and implementation of R&D CMOS sensors on rolling shutter and global shutter readoutsImplemented various blocks testing new algorithms for noise and power reduction, speed improvementRTL integration using inherited databasesAnalog design support.

Scottsdale, Arizona, US

• Participated in the design and tape-out of 8,10,14,18,20 and 25 MegaPixel CMOS based color sensors.
• Digital lead role for 8Mp and 14Mp color sensors, owning design from conception through post production, leading a design / verification team spread over several international sites, uncluding a 8Mp 5x4 array imager.
• RTL integration using a shared database maintained by independent internationally distributed design groups.
• Support analog design, physical implementation, product and application / product Engineering and customers.
• Definition, Verilog RTL design, integration and verification of pixel timing generation, offset / dark current compensation, channel balance, row wise temporal and column fixed pattern noise correction, gradient.
• Architecture support and maintenance.

Rochester, New York, US

• Studied, designed, verified and hardware-characterized imaging algorithms (Auto exposure, Offset Correction, Defect Correction, Special effects, Contrast/brightness/saturation)
• Independently converted a 2Megapixel monochrome automotive camera-on-a chip device to color, acted as design lead through post production.
• Wrote functional test benches and tested block-level RTL (Verilog-XL / VCS).
• Top level clock tree design, integration and Physical Synthesis (Physical / power Compiler)
• Static Timing Analysis of post-route top-level 0.18um CMOS netlists (Primetime).
• Top-level design-for-test integration (Tetramax).

Munich, Bavaria, DE

• Architecture, design, and implementation using standard-cell and transistor-level logic on monochrome gray-scale OLED display drivers with programmable driving schemes.
• Designed custom dual-port static memory at transistor level, with perpendicular port addressing and asynchronous (non-clocked) logic. Integrated custom functions in memory periphery at transistor-level to reduce.
• Participated in the definition of top-level chip architecture and wrote top-level functional test benches.
• Specified, designed, implemented and tested cascadable high-power color graphic LED drivers using high-speed custom serial interfaces and uniformity calibration circuitry with on-chip EEPROM.
• Integrated and tested JTAG on a 1Ghz optical fiber mux/demux chipset.
• Periodically managed a design group during various design phases, including tape-out, with timely completion and coordination between team members. Management duties supplemented regular design tasks.

Developed ASIC and FPGA implementations of data encryption algorithms used in commercial broadcast and defense systems.Successfully supervised, designed, prototyped (in FPGA) and tested a 240Mhz mixed-signal CODEC ASIC with a unique encryption algorithm in 1.5um CMOS technology using VHDL.Developed and deployed a software and hardware toolset embedding.

Pretoria, Gauteng, ZA

Designed digital imaging devices and developed far-infrared InSb and Silicon Photodiode Sensors.Researched, developed and characterized Silicon photo sensors and related processing techniques.Developed a highly accurate multi-layer wafer bonded light mask using layered, anisotropically etched Silicon for large-area quadrant PIN photodiodes and ultraviolet.

Masters Of Engineering, Electrical And Electronics Engineering

Bachelor Of Science (B.Sc.), Electronic Engineering