Designed Receiver module used in phased array RADAR- PCB design- Gain/Noise Figure analysis- Testing of receiver- Calibration for line array as part of beam formerSolved product obsolescence issue for an old ICBM power supply controller- Found die part replacements for new hybridized module

Provided reliability analysis for several Jet Propulsion Laboratory (JPL) programs- Mars 2020, Europa Clipper, MAIA and Grace-FO programs- Failure Report analysis- Single Event analysis (SEEA) for John’s Hopkins Applied Physics Lab Radio- SEEA analysis for Diode Box- Worst Case analysis for REASON VHF Transmit/Receive module- SEEA review analysis for JPL Drive Electronics Unit for Bi-Axial Gimbel Assembly robotics.- Interface Failure Modes, Effect and Criticality analysis (I/F FMECA) for Grace LNA and Antenna interface.

Design for X-Band x8 multiplier used on FMCW RADAR- PCB design- Gain/Noise figure analysis Design of receiver and exciter for a digital receiver system- Receiver board design- Transmitter board design- Gain/Noise Figure analysis- Frequency planningDesigned 100 MHz to 2.5 GHz LNA using pHEMPT transistors.- Design matching circuits- Built prototypes using 0201 sized parts- RF probing to acquire S-Parameter data for transistors and passives- RF probing for S-parameter dataDesign and built a four channel S-Band receiver- Built chassis and chose connectorized components for receiver- Tested FPGA based DSP algorithm for beam formingDesigned a gate lockout circuit for an HPA productDesigned Ka Band Transmit/Receive Module- Wrote specifications- Designed module in low profile LTCC package- Prepared library of ICs in bare die form for use in the module- Wrote program for PIC to control features in module (phase adj., attenuation, gate bias)- Gain/Noise/Distortion distribution worst case analysis- Voltage and current de-rating for stress- Worst case power dissipation- PC board width/length analysis to determine line impedanceDesigned Super-heterodyne Digital Receiver for RADAR- Translated RADAR specification for use in radio system- Ran Microwave Office simulations for cascade of radio- Developed spreadsheet for radio cascade and spur search- PC Board Layout- Designed PCB layouts for evaluation boards at both IF and RF- Designed PCB layout for main RF, Power and distribution and FPGA boards- Tested Individual Sections- ADC Evaluation- Timing skew problems solved with new layout- Integrated new firmware for FPGA

Wireless R&D (2012-2013)- Designed Microwave Multiplexer- Wrote specifications for Picocell radio interface- Designed Filters/Diplexer for both WiFi band and Public Safety- Microwave Office and HFSS simulation tools used- Diptrace layout using surface mount devicesPC Board Layout for Triplexer- Used a lumped component design for low WiFi band (2.4 GHz)- Coupled Filter design for the higher bands (4.9 and 5.8 GHz)

Redesigned WiFi board to implement an Audio output, change digital interfaces to a PIC controller and implemented serial UART connection. Supported PIC programming. SPICE analysis completed for interface design. PC Board Layout to implement redesign and future test capabilities.Also designed Bluetooth module board for ID tag/indoor positioning.

Designed 100 MHz to 2.5 GHz LNA using pHempt transistors. Designed matching circuits and implemented using 0201 sized parts on in-house designed substrate. Also performed RF probing for S-parameter data to use in designs.Participated in design and tested high power microwave amplifier chain from 6 GHz to 18 GHz- Built prototypes using 0201 passives and customer supplied MMICs- Layout of 6 GHz to 18 GHz attenuators on aluminum nitride substrates

Designed a High Frequency transceiver for shortwave communication. Responsible for design, testing and troubleshooting and supervised PCB layout which utilized surface mount technology. Specifications guided by Mil-Std-188-141B. Board included PIC device, MMIC and other RF components. Also implemented AGC loop using PIC microcontroller.

Design transmit/receiver IC used for utility company data collection and billing. Design used Jazz SiGe process. IC layout using Cadence Design System.

Part of team that redesigned transmitter section of 3.5 GHz TX/RX IC.Design tasks included:- Lowering noise and raising compression levels in both IF AGC section (350 MHz) and RF output amplifier (3.5 GHz).- Design used MAXIM SiGe process.- Ran simulations of 6 GHz Transmitter/Receiver used in wireless internet access product.- Ran simulations to verify wafer probe testing. Design implemented in MAXIM SiGe process.

Project lead for a Direct Conversion Receiver for use in US satellite TV. Design tasks included 900 MHz to 2150 MHz AGC, Mixer, VCO and I/Q Phase Shifter. Design implemented in PHILLIPS BiCMOS process.Project lead for a Direct Conversion Receiver for use in satellite TV. Design included 900 MHz to 1450 MHz AGC, Mixer and VCO and I/Q Phase Shifter. Design implemented in SSI BiCMOS process.

Worked with team on a 600 MHz Down Converter Mixer bipolar IC for use on ICO satellite. The task included simulation, layout and routing of the IC. Design implemented in MAXIM BiCMOS process.Worked with team on a 500 MHz I/Q Detector/Mixer bipolar IC for use on AGRANI cellular telephone satellite. The task included simulation, layout and routing of the IC. Design implemented in MAXIM BiCMOS process.Designed a 10 MHz 14-Bit sub ranging Analog to Digital Converter used on several airborne RADARs. The task required a mixed signal design for the architecture of the converter, designing a timing scheme and writing design requirements for four IC's required to implement the hybrid. The task included design, simulation, layout and routing of the hybrid.Testing Hybrid Mircrocircuit devices using manual and auto tests.