John Sochacki Email & Phone Number

Germantown, MD, US

Vancouver, Washington, US

Mclean, VA, US

• System level design of novel satellite system architectures that leverage MIMO and beamforming technology for increased flexibility, reliability, and throughput
• Education of engineering saff about next generation satellite system technology and the fundamentals of MIMO and beamforming systems
• System level performance analysis of next generation satellite systems that are just beginning the implementation phase
• Analysis of technology, capacity, cost, and coverage of different Teir 1 satellite operators and their state of the art systems
• Writing of RFPs for vendor based work required for system level and subsystem level functions
• Working with the different payload manufacturers making payloads for our systems to ensure their design is consistent with our needs

Germantown, Maryland, US

System and Signal Processing Engineering work foro Mil Aero weather prediction and EW systemo Mil Aero SIGINT based combat Identification systemo Mil Aero Mechanically reconfigurable beamforming array systemo 2GHz instantaneous bandwidth 20MHz – 18GHz simultaneous transmit and receive (STAR) systemo 20MHz – 44GHz correlative interferometer based direction.

Carlsbad, CA, US

• Member of team that assess and evaluates future communications network architectures determines worthy pursuits
• Led beyond future satellite payload conceptualization and design team for next next generation systems
• High capacity satellite payload design (Viasat3)o.... Worked on oversight of and system requirements for entire payload aside of power systems and antennaso.... Wrote specifications and requirements for payload.
• High capacity satellite ground system design (Viasat3)o.... Defined the system requirements for phase noiseo.... Wrote the specifications for system synthesizerso.... Worked on system requirements for and development.
• Full system signal processing GPU/C++ implementation and design
• System requirements for low noise system design

Chandler, AZ, US

• Complete end to end design of 250/500 W GaN block up converter unit/system with high speed DSP functionality
• Design wideband L, C, X, Ku, and Ka band diode and FET pre-distortion linearizers
• Create and develop Distortion-Power Adapted Adaptive Pre-Distortion (DPAPD) (patent WO2014201390 A1), ISFS Feedback (patent pending Application # 61834652), and 4 other systems and methods under patent process
• Design, develop, and maintain Tropo, C, X, Ku, and Ka band power amplifiers and BUC’s from 10 W to 2k W
• Implemented 2 different novel non-OFDM PAPR technique in CDM-760 Satellite Trunking Modem
• Implementing digital pre-distortion in CDM-760 and CDM-850 satellite modem for use with multi manufacturer site installations

Tempe, AZ, US

• Optimization, modeling, implementation, and innovative design of PD and FD MeSFETs in commercial SOI IC technologies from 300nm to 45nm for use in regulation (buck and LDO) and RF (PA) applications
• Create and develop Lattice MeSFET for use in power amplifier design
• Design and implement MeSFETs, MeSFET circuitry, and ESD circuitry in commercial SOI IC technologies such as: IBM’s IBM12SO; MITLL’s 1D and 3D; Peregrine’s STeP4, STeP3, and GC SOS; Honeywell’s S150 and MOI5; SPAWAR
• MeSFET high frequency buck converter design, implementation, and testing for extreme environments (temperature and radiation)
• Characterize (extract TOM3&4 models, do load pull), and test class E/F single chip 1W power amplifier for use at 1, 2.4, and 5 GHz using MITLL, STeP4, and S150 processes

Tempe, AZ, US

• Modeling of radiation effects on devices in the IBM12SO process (45nm SOI)
• Designed annular, laterally-diffused, and laterally-diffused annular MOSFETs in the IBM12SO process (BOEING)
• Designed portions of 10Gbps SerDes (current starved vco, phase lock loop, latch cluster) for space application (BOEING)
• Modeling of radiation-induced leakage due to trapped charge in the STI sidewall for 90nm bulk CMOS
• Modeled layout and fabrication process based mitigation of SEE on SRAM cells
• Characterized PZT and other novel materials for use as radiation sensors in an RF RCS measurement system

Fairfax, VA, US

• Analysis, assessment, and remediation of SGEMP on satellite circuitry involving GPS power amplifier, base-band stage, mixed-band stage, and remaining modules in the entire GPS system

Pullman, WA, US

• Design of RTD/Thermocouple (10 RTD) based temperature sensor card for use in SEL-710/749M motor protection relay/motor relay
• Design of 3-way power switch (ACI / AVI) array card for use in SEL-2414 transformer monitor
• Microwave power exposure survival analysis and failure testing of 710, 2414, and 2440
• Writing VHDL and test benches for SEL-2440 discrete programmable automation controller

• Design of annular, laterally-diffused, and laterally-diffused annular MOSFETs in IBM9SF process
• Reliability testing of British Aeronautical Engineering (BAE) ESD devices
• Flex FET and diode design in American Semiconductor flex set process

Doctor Of Philosophy (Phd), Electrical Engineering

Master'S Degree, Electrical Engineering

Bachelor'S Degree, Electrical Engineering

Associate Of Arts (Aa), Physics