Jon Bean
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Jon Bean Email & Phone Number

HWIL COE RF Senior Manager at Lockheed Martin
Location: Orlando, Florida, United States 8 work roles 2 schools
1 work email found @irespond.com LinkedIn matched
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Current company
Role
HWIL COE RF Senior Manager
Location
Orlando, Florida, United States
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Jon Bean is listed as HWIL COE RF Senior Manager at Lockheed Martin, a with 101322 employees, based in Orlando, Florida, United States. AeroLeads shows a work email signal at irespond.com and a matched LinkedIn profile for Jon Bean.

Jon Bean previously worked as HWIL IPT Lead at Lockheed Martin and HWIL COE Senior Manager at Lockheed Martin. Jon Bean holds Master Of Science - Ms, Electrical And Computer Engineering from University Of Florida.

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About Jon Bean

Jon Bean is a HWIL COE RF Senior Manager at Lockheed Martin. He possess expertise in hardware architecture, pcb design, embedded systems, schematic capture, electrical engineering and 6 more skills.

Listed skills include Hardware Architecture, Pcb Design, Embedded Systems, Schematic Capture, and 7 others.

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Jon Bean's current company

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Lockheed Martin
Lockheed Martin
HWIL COE RF Senior Manager
Orlando, FL, US
Employees
101322
AeroLeads page
8 roles

Jon Bean work experience

A career timeline built from the work history available for this profile.

Hwil Coe Senior Manager

Bethesda, Md, Us

HWIL Center of Excellence (COE) Senior Manager leading the design and execution of new HWIL Development for all Programs at LM MFC (Dallas and Orlando). Lead an organization of ~75 Engineers that continues to grow rapidly as new Programs are established.Provide technical leadership for the design and development of real-time, closed-loop Radio Frequency (RF) Seeker HWIL Simulation Infrastructure for five unique laboratory platforms.HWIL Engineering and Technology Manager (ETM) for a team of RF, Aerospace, Systems, Software, Digital Design and Mechanical Engineers.Developed System Performance Specification (SPS) requirements; led System Requirements Review (SRR).Facilitate HWIL team progress towards Preliminary Design Review (PDR) and Critical Design Review (CDR) Systems Engineering Technical Review (SETR) process events.Developed Guidance Navigation and Control (GNC) Computer-in-the-Loop (CIL), RF-Injected CIL, Static HWIL and Full-Motion Dynamic HWIL architectural designs in Rhapsody.Directed technical-team progress toward a high-fidelity, Field-Programmable Gate Array (FPGA) based Digital RF Memory (DRFM) target generation system.Fostered the HWIL portion of the Systems Engineering, Integration and Test (SEIT) branch’s Agile transformation process as the Scrum Master.Generated derived requirement specifications and design details for RF Up/Down Converters, Anechoic Chambers, Target Antenna Array Walls, and the RF Signal Generation Chain.Earned Value Management (EVM) Control Account Manager (CAM) for HWIL Work Breakdown Structure (WBS) (~$80M).

Senior Rf Engineer

Reliance Test & Technology, Llc

Provide technical leadership for the design and development of two Hardware-in-the-Loop (HWIL) real-time, closed-loop Radio Frequency (RF) Seeker simulators (X-Band and Millimeter Wave (MMW)).Manage the integration, requirement verification, simulation validation (V&V), and operations of HWIL simulators.Model and simulate (M&S) RF Seeker signal processing chain that utilizes Digital RF Memory (DRFM) digital signal processing (DSP) modules to apply Doppler frequency shift & range attenuation to target return signals. The system also simulates electronic attack response, environmental effects, and ground clutter.M&S RF mixer up/down conversion spurious response susceptibility using MATLAB & SystemVue. Developed automated monopulse antenna calibration software using a Keysight Precision Network Analyzer (PNA), gimbaled electric positioner, and a three-axis Flight Motion Simulator (FMS).Developed software that exports emitter models from the Electronic Warfare Integrated Reprogramming (EWIR) database to an agile signal generator (Keysight N5193A UXGs) NEWEG threat emitter system.Analyzed required test scenarios to ensure that a six degrees-of-freedom (6DOF) simulation can be accomplished by combining three-axis FMS movement with synthetic line-of-sight (SLOS) RF agility.Developed System Concept of Operations (CONOPS). EVM CAM for multiple Work Breakdown Structures (WBS) (~$68M of $160M program). Constructed and implemented a 7-year RF procurement, HWIL development, hardware installation and UUT integration forecast.Created HWIL System Performance Specification (SPS) requirements supporting the formal Systems Engineering Technical Review (SETR) process.Develop Models-Based Systems Engineering (MBSE) SysML Requirements Diagrams, Block Definition Diagrams (BDD), Internal Block Diagrams (IBD), Use Cases, Activity Diagrams, et al. Provide technical guidance in support of the program risk management process.

Apr 2017 - Oct 2019

Emc/Emi Engineer

Survice Engineering

Developed electromagnetic simulations using CST Microwave Studio to evaluate the electromagnetic environment (EME) of multiple aircraft platforms.Quantified the potential for radiating stores to cause electromagnetic interference (EMI) with aircraft systems.Designed aircraft antenna models and completed simulations to match measured scattering parameters and antenna patterns.Led F-16C/D telemetry antenna placement optimization and GPS co-site interference analysis.Developed F-35A CTOL and F-35B STOVL CST EME simulation models evaluating aircraft skin penetration due to lightning strikes for the F-35 Joint Program Office (JPO).Led F-15E EME characterization test in the JPRIMES anechoic chamber. Used measured test results to validate CST and CREATE-RF / SENTRi simulation results. Coauthored IEEE publication comparing time domain Computational Electromagnetic (CEM) simulation results with measured test results. Selected for presentation at the 2017 IEEE EMC International Symposium - DOI: 10.1109/ISEMC.2017.8077964.Executed Low-Level Continuous Wave Immersion (LLCWI) test to characterize the F-15E aircraft’s vulnerability to high-altitude electromagnetic pulses (HEMP) at NAS Pax River, MD.Evaluate the Hazards of Electromagnetic Radiation to Ordnance (HERO) of aircraft stores with Electronically Initiated Devices (EIDs) in accordance with MIL-STD-464C and NAVSEA OP 3565/NAVAIR 16-1-529.Conducted electromagnetic compliance ground tests to ascertain store compatibility with multiple aircraft.Served as the EMC/EMI team’s primary technical lead for SEEK EAGLE’s newly acquired HPC GPU cluster.Generated training materials detailing the CST electromagnetic simulation process for new employees.Designed RF transmitter, discrete input PCB, and battery charging circuit for a metrology wand used in real-time assessment of aircraft damage. Developed embedded firmware to interface between legacy hardware and modernized metrology wand.

Jul 2015 - Apr 2017

Lead Hardware Design Engineer

Wireless Esystems

Designed RF handheld classroom testing devices.Duties included presenting conceptual designs, schematic creation, PCB layout, prototype testing, CAD plastic enclosure design, and production oversight.Corrected legacy production unit test software, resulting in a 250% reduction in unit testing time. Redesigned flagship legacy product and reduced per-unit cost by over 300%.Designed Folded Dipole omni-directional PCB trace antenna & tuned transceiver RF Matching Network.Designed a touch-screen handheld RF remote as well as a compact, cost-effective “mini” remote.Developed software that utilized a transceiver’s Received Signal Strength Indicator (RSSI) to automatically switch to suitable RF channels within the Industrial, Scientific and Medical (ISM) 2.4 GHz RF band.Reduced RF packet loss by modifying legacy PCB layouts to reduce electromagnetic interference.Directed FCC compliance testing in accordance with ANSI C63.4-2003 to ensure that all RF devices met FCC emissions standard FCC15.249 for Low Power Communication Devices.Directed large-scale contract manufacturing process.

Jun 2009 - Jul 2015

Hardware Design Engineer

Wireless Esystems
Apr 2007 - Jun 2009

Electrical Engineer

Celltec Ind., L.L.C.

Responsible for hardware design and embedded software development of battery monitoring equipment with Cypress Programmable System on Chip (PSoC) microprocessors.Interfaced the PSoC microprocessor with voltage monitoring chips using an I2C interface.Designed and implemented battery state-of-charge (SOC) / discharge characterization testing.Developed RS-485 communication software to interface devices with remote LCD screens.

Apr 2005 - Apr 2007
Team & coworkers

Colleagues at Lockheed Martin

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2 education records

Jon Bean education

Master Of Science - Ms, Electrical And Computer Engineering

University Of Florida

Bachelor Of Science - Bs, Electrical Engineering

University Of Florida
FAQ

Frequently asked questions about Jon Bean

Quick answers generated from the profile data available on this page.

What company does Jon Bean work for?

Jon Bean works for Lockheed Martin.

What is Jon Bean's role at Lockheed Martin?

Jon Bean is listed as HWIL COE RF Senior Manager at Lockheed Martin.

What is Jon Bean's email address?

AeroLeads has found 1 work email signal at @irespond.com for Jon Bean at Lockheed Martin.

Where is Jon Bean based?

Jon Bean is based in Orlando, Florida, United States while working with Lockheed Martin.

What companies has Jon Bean worked for?

Jon Bean has worked for Lockheed Martin, Reliance Test & Technology, Llc, Survice Engineering, Wireless Esystems, and Celltec Ind., L.L.C..

Who are Jon Bean's colleagues at Lockheed Martin?

Jon Bean's colleagues at Lockheed Martin include Howard Taylor, Paulette Reel, Paul Brack, Carlos P. Johnson, and Al Cannaday.

How can I contact Jon Bean?

You can use AeroLeads to view verified contact signals for Jon Bean at Lockheed Martin, including work email, phone, and LinkedIn data when available.

What schools did Jon Bean attend?

Jon Bean holds Master Of Science - Ms, Electrical And Computer Engineering from University Of Florida.

What skills is Jon Bean known for?

Jon Bean is listed with skills including Hardware Architecture, Pcb Design, Embedded Systems, Schematic Capture, Electrical Engineering, Integrated Circuit Design, Rf, and Electronics.

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