Jonathan Graf, Phd Email & Phone Number

Blacksburg, Va, Va, Us

Jonathan Graf drives Graf Research to unleash innovation. We are located in Blacksburg, VA, Atlanta, GA, and Dayton, OH.

Dayton, Ohio, Us

Jonathan co-led the SCC division to a 2013 acquisition by MacAulay-Brown (MacB), resulting in the transfer of an arsenal of DoD SBIR- and research-BAA-developed technologies into active daily use on defense programs. Jonathan remained at MacAulay-Brown to ensure the success of that technology transfer prior to founding Graf Research. At MacB, Jonathan directed the research, development, and deployment of the technologies in MacB’s Secure Computing and Communications Division. He oversaw technology development for multiple DoD customers in fields of microelectronics trust, aerospace applications, information assurance, cyber security, reverse engineering of microelectronic devices, and integrity verification. Jonathan focused on applying MacB's FPGA design integrity solutions to solve problems related to DoD Trust, high-reliability verification, design migration for anti-obsolescence, space applications, and IP verification.

Roanoke, Virginia, Us

Jonathan Graf directed the research, development, and deployment of Luna’s Secure Computing technologies. At Luna, he served in the role of Principal Investigator and Project Manager for Luna’s prime contracts as the FPGA performer on both the DARPA Trust and DARPA IRIS programs. He also served as Principal Investigator for 18 DoD SBIR projects, whose topics have centered on trust and anti-tamper technologies for FPGAs and ASICs. Jonathan focused on applying Luna's FPGA design integrity solutions to solve problems related to DoD Trust, high-reliability verification, design migration for anti-obsolescence, space applications, and IP verification. Projects led by Jonathan Graf as Principal Investigator and Project Manager include:• DARPA Integrity and Reliability of Integrated CircuitS (IRIS) BAA• DARPA Trust in ICs BAA• Trust in Fabrication, Army/OSD SBIR• Secure Software Platform (SSP), Air Force/OSD SBIR• Dynamic Module Server for FPGA Defragmentation, Air Force SBIR• Amorphous Soft-Core Processor for Hardware Anti-Tamper, Army SBIR• Technology for Trusted Circuits, DARPA/Army SBIR• Dynamic Hardware Development Methodology for FPGAs, DARPA/Army SBIR• SSP for Embedded Software Anti-Tamper, MDA SBIR• SSP with Tamper Detection and Response, Army SBIR• Advanced Software Protection, Air Force/OSD SBIR• Wearable Computing for Enhanced Situational Awareness, Air Force SBIR• Sub-Vocal Biometric Authentication System, Army SBIR• Biometric Identity Verification, Navy SBIR

Fairfax, Va, Us

Consulted for and managed FPGA development projects part-time while completing Virginia Tech course work

Blacksburg, Va, Us

Performed thesis research on FPGA-based cryptographic functions in reconfigurable software radio systems and secure software environments; assisted in a computer engineering laboratory and graded for several microprocessors courses

Santa Clara, California, Us

Constructed a synthetic load benchmarking application in Direct3D using C++; predicted, tested and evaluated the performance of 3D graphics applications. Served two internship terms: seven months in 2000, three in 2002.

Designed and implemented a document management website.

Overland Park, Kansas, Us

Utilized network CAD software to diagram nationwide telecommunications networks

Founded and managed a computer retail business

Doctor Of Philosophy - Phd, Computer Engineering

Master Of Science (M.S.), Computer Engineering

Bachelor Of Science (Bs), Computer Engineering

Assorted Coursework While In High School / College Prep, Electrical Engineering