Jonathan Schuster
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Jonathan Schuster Email & Phone Number

Electronics Engineer at the U.S. Army Research Laboratory at U.S. Army Research Laboratory
Location: Washington Dc-Baltimore Area, United States 5 work roles 4 schools
1 work email found @army.mil LinkedIn matched
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Current company
U.S. Army Research Laboratory
Role
Electronics Engineer at the U.S. Army Research Laboratory
Location
Washington Dc-Baltimore Area, United States

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Jonathan Schuster is listed as Electronics Engineer at the U.S. Army Research Laboratory at U.S. Army Research Laboratory, based in Washington Dc-Baltimore Area, United States. AeroLeads shows a work email signal at army.mil and a matched LinkedIn profile for Jonathan Schuster.

Jonathan Schuster previously worked as Electronics Engineer at U.S. Army Research Laboratory and ORAU Postdoctoral Fellow at Army Research Laboratory. Jonathan Schuster holds Doctor Of Philosophy (Ph.D.), Electrical Engineering from Boston University.

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About Jonathan Schuster

Passionate and proficient electrical engineer with a strong interest in semiconductor device design & analysis, numerical modeling and infrared (IR) detectors. Dr. Schuster completed his PhD at Boston University in 2014, where he conducted extensive research on utilizing numerical models to understand, design & optimize IR detector technology on numerous DoD & industry programs, which led to 15 peer-reviewed publications & conference proceedings, 6 first author conference presentations and awards in excess of $250,000. Currently, he’s employed as an Electronics Engineer at the U.S. Army Research Laboratory (ARL), where he established a robust two-and three-dimensional (2D/3D) numerical device modeling capability for simulations of complex IR devices and focal plane arrays (FPAs) pertinent to the U.S. Army.

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U.S. Army Research Laboratory
U.S. Army Research Laboratory
Electronics Engineer at the U.S. Army Research Laboratory
5 roles

Jonathan Schuster work experience

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Electronics Engineer

Current
U.S. Army Research Laboratory
May 2016 - Present

Orau Postdoctoral Fellow

Army Research Laboratory

Established a robust two-and three-dimensional (2D/3D) numerical device modeling capability at the U.S. Army Research Laboratory (ARL) for simulations of complex infrared (IR) devices and focal plane arrays (FPAs) pertinent to the U.S. Army. The modeling capability was tied directly to manufacturing through collaborations with key industrial players and U.S. Army Research, Development and Engineering Centers (RDECs). Through these collaborations and integration into ARL’s internal material growth and device fabrication/processing, the modeling capability will successfully accelerate IR technology by:1) Understanding current state-of-the-art devices - i.e. discerning fundamental versus technological limitations2) Exploring the parameter space to achieve optimum performance3) Conceptualizing new IR device architectures that will provide improvements over the current state-of-the-art devicesUltimately, the 2D/3D numerical device modeling capability will form a core competency within ARL’s "Semiconductor Materials and Device Modeling Center," successfully accelerating IR detector technology by coupling numerical simulations with the efforts of key industrial players.

Oct 2014 - May 2016

Graduate Research Assistant, Computational Electronics Laboratory

● Conducted electromagnetic and electrical modeling of photon-trapping (PT) structures to enhance broadband absorption and reduce dark current in mid-wavelength (0:5 - 5:0 um) infrared photodetectors. Utilized the finite-difference time-domain method to solve Maxwell’s equations and the finite element method to solve the drift diffusion equations. Engineered the use of the PT structure to yield a predetermined response by tuning the spectral sensitivity. Investigated the influence of the PT structure on optical crosstalk and crosstalk due to diffusion of photo-generated carriers. Research funded by BAE Systems (Lexington, MA) through the DARPA AWARE program and DRS Sensors & Targeting Systems, Inc. (Cypress, CA). Directly assisted in securing funds from DRS totaling $100,000.● Employed finite element simulations to perform physics based modeling of InAs/InAsSb nBn detectors, placing particular emphasis on studying the underlying physics in nBn detector arrays. Simulations revealed the presence of a lateral collection mechanism of photo-carriers that corroborates recent unexplained experimental results. Research partially funded by ARL through the Collaborative Research Alliance.● Designed and carried out experiments to test a new method for temporary hybridization of large format focal plane arrays (FPAs) to readout integrated circuits (ROICs) using a Karl Suss FC150 flip-chip bonder. ROICs can then be used repeatedly to test large format FPAs, reducing costs associated with discarding good ROICs on bad FPAs and good FPAs on bad ROICs. FPAs can then be hybridized to ROICs using standard indium bump technology. Research funded by Photronix, Inc. (Burlington, MA) through a U.S. Air Force phase II SBIR.

Aug 2010 - Oct 2014

Graduate Teaching Fellow

Graduate Teaching Fellow for EC463 Senior Design I. Duties included: ● Guided and evaluated senior level undergraduates on their senior design projects ● Graded student’s project reports ● Held office hours ● Assisted students in tackling the challenges associated with their projects

Aug 2010 - Dec 2010

Nsf Csums-Funded Research Assistant

Developed new models to characterize polarization-mode dispersion (PMD) in optical fiber communication systems based on recent measurements of installed optical fibers which suggest that previous PMD generation models are unrealistic. Implemented advanced statistical methods to estimate system outages for the proposed models. Developed efficient numerical algorithms to assess the effects of polarization-mode dispersion in optical fiber communication systems. Used the algorithms to perform extensive numerical simulations to estimate the impact of PMD on various types of installed systems. Research partially funded by the “URGE to Compute” program through NSFs CSUMS grant.

Jan 2009 - Jun 2010
4 education records

Jonathan Schuster education

Doctor Of Philosophy (Ph.D.), Electrical Engineering

Activities and Societies: Student Association of Graduate Engineers (SAGE)

Master Of Science (M.S.), Electrical Engineering

Activities and Societies: Student Association of Graduate Engineers (SAGE)

FAQ

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What company does Jonathan Schuster work for?

Jonathan Schuster works for U.S. Army Research Laboratory.

What is Jonathan Schuster's role at U.S. Army Research Laboratory?

Jonathan Schuster is listed as Electronics Engineer at the U.S. Army Research Laboratory at U.S. Army Research Laboratory.

What is Jonathan Schuster's email address?

AeroLeads has found 1 work email signal at @army.mil for Jonathan Schuster at U.S. Army Research Laboratory.

Where is Jonathan Schuster based?

Jonathan Schuster is based in Washington Dc-Baltimore Area, United States while working with U.S. Army Research Laboratory.

What companies has Jonathan Schuster worked for?

Jonathan Schuster has worked for U.S. Army Research Laboratory, Army Research Laboratory, Boston University, Department Of Electrical And Computer Engineering, and University At Buffalo, Department Of Mathematics.

How can I contact Jonathan Schuster?

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What schools did Jonathan Schuster attend?

Jonathan Schuster holds Doctor Of Philosophy (Ph.D.), Electrical Engineering from Boston University.

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