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Jonathan Sprague Email & Phone Number

Distinguished Engineer at Dell Technologies
Location: West Boylston, Massachusetts, United States 11 work roles 1 school
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Role
Distinguished Engineer
Location
West Boylston, Massachusetts, United States

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Jonathan Sprague is listed as Distinguished Engineer at Dell Technologies, based in West Boylston, Massachusetts, United States. AeroLeads shows a matched LinkedIn profile for Jonathan Sprague.

Jonathan Sprague previously worked as Technical Staff, Systems Development Engineering at Dell Technologies and Senior Principal Systems Development Engineer at Dell Technologies. Jonathan Sprague holds Bsee, Electrical Engineering from Northeastern University.

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Dell Technologies

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About Jonathan Sprague

Hardware Engineering leader with over 16 years' experience in the storage industry and a proven track record of delivering products from initial conception through production. Established leadership abilities across cross functional teams with a core strength of leading through influence. Equally comfortable working with teams large and small, local and remote. Highly flexible and comfortable in fast paced, constant change environments.In my spare time I can be found creating and performing music, dabbling in photography, and hiking.

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Jonathan Sprague's current company

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Dell Technologies
Dell Technologies
Distinguished Engineer
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11 roles

Jonathan Sprague work experience

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Distinguished Engineer

Current

Round Rock, Texas, Us

• Platform Architect for the Telecom Systems Business's Infrastructure Engineering team defining next generation RAN and Edge platforms for the Telecom industry• Directly engaged with end customers and account teams to enable successful RAN deployments as well as providing engineering support for critical issues

Dec 2022 - Present

Technical Staff, Systems Development Engineering

Round Rock, Texas, Us

Apr 2022 - Dec 2022

Senior Principal Systems Development Engineer

Round Rock, Texas, Us

Jan 2021 - Apr 2022

Hardware Manager

North Reading, Ma, Us

• In charge of the Hardware PCB team that develops all the test site electronics hardware for the Teradyne System Test organization• Management duties include oversight of full time Teradyne hardware engineering staff (US and Philippines) as well as contract engineers and sub-contractor design houses• Actively staffing up local and remote teams in preparation for new product design cycles

Jun 2020 - Nov 2020

Senior Principal Hardware Engineer/Hardware Architect

Round Rock, Texas, Us

• Responsible for defining future platform hardware architectures in Dell EMC's Isilon Scale-Out NAS solutions• Continuously collaborating with Product Management to refine internal and market requirements into planned future roadmap product offerings• Leading cross-functional technical collaboration with Platform and Systems Engineering, Global Supply Chain and other internal teams to define new hardware designs for future storage platforms• Actively engaged with members of the Office of the CTO in analyzing future looking technologies in the CPU, memory and storage spaces

Feb 2019 - Jun 2020

Senior Principal Hardware Engineer

Round Rock, Texas, Us

• Systems Engineering Lead responsible for gathering requirements for the next generation Enterprise class compute and storage platforms• Actively analyzing forward looking technologies in the CPU, Storage Class Memory, and Fabric spaces with a focus on next generation Enterprise Storage use cases

Oct 2017 - Feb 2019

Principal Hardware Engineer

Round Rock, Texas, Us

• Hardware Engineering Lead on an innovative, composable, Converged Infrastructure appliance proof of concept. Developed the key hardware and internal fabric architecture for the program. Responsible for overseeing the entire project from initial project pitch to management through successful demo. Oversaw the architecture and design of 23 distinct board designs ranging from CPU Modules, Storage Modules, GPU Modules, I/O Modules, Fabric Modules, midplanes, and test cards. Product owner of a HW Sprint team managing the designs as part of an Agile methodology. • Working manager overseeing a small team of Senior and Principal engineers as well as college co-op students. Managed status updates and feedback on professional growth via 1:1 meetings as well as performance appraisals. Provided justification to upper management for promotions. Mentored co-op students and provided performance feedback to the universities. Member of department intern/co-op and new-hire interview team• Hardware Engineering Lead on the Data Domain DD9800 hardware platform. Oversaw a JDM design team (Inventec) comprised of logic, SI, firmware, mechanical and thermal engineers. Managed internal and external PCB design reviews, bug tracking, and hardware qualification. Successfully brought the product from the DVT stage through HW RTM and GA• Created initial high-level hardware architecture for VMAX all flash kicker project that was productized as the VMAX 250F and 950F. Worked to minimize design risk by basing the bulk of the design on the existing 450F/850F.

Sep 2012 - Oct 2017

Senior Hardware Engineer

Round Rock, Texas, Us

• Hardware Engineering Lead that successfully launched a common hardware platform used in the following storage products: VMAX3 Family (100K, 200K, 400K), VMAX All Flash Family (450F, 850F), VNX (VNX8000), and Data Domain (DD4200, DD4500, DD7200). Oversaw all specification creation, PCB design, EVT/DVT testing for seven logic boards. Drove technical issues to closure through multiple cross functional meetings comprised of engineering, business unit, and advanced manufacturing teams. Drove costing analysis of the hardware platform through the supply base team. Architected the internal Fault Status Register specification for the platform. • Led small critical response teams that performed root cause analysis on high profile issues including DIMM soft errors, CPU IERRs, ESD testing failures and transportation board flex failures. Reported failure analysis status regularly to management through successful issue remediation• Board Lead on a dual socket Intel Sandy Bridge/Ivy Bridge motherboard design. In charge of all aspects of the design including specification creation, schematic capture, constraint entry, and layout support. Worked to architect a scalable platform that could easily extend down to a single socket and up to a quad socket from a GPIO and management perspective.• Board Lead on an I/O Annex that extended I/O support to two additional I/O Modules for the VMAX V2 product line.• Point person in charge of all testing and documentation related to thermal throttling on FBDIMMs used in the first Intel based VMAX solution. Analysis used to create closed-loop throttling algorithm in BIOS

Mar 2007 - Sep 2012

Hardware Engineer 2

Round Rock, Texas, Us

• Junior motherboard designer on converged hardware platform used by Symmetrix (VMAX) and Clariion (CX4-960). In charge of the Intel southbridge and management Ethernet areas of the design.• Led documentation of a cross-business unit SMI Error Handler document that provided the framework for all PCIe, protocol and internal errors across multiple product lines• Led SMI handler fault injection effort using Agilent PCIe exercisers.

Mar 2005 - Mar 2007

Hardware Co-Op

Round Rock, Texas, Us

• Designed a 2G/4G Fibre Channel/RS-232 diplexing debug card for the purpose of separating an RS-232 diplexed signal from a Fibre Channel signal in EMC systems• Performed EVT/DVT testing and debug as well as SPOF (Single Point of Failure) testing on the latest storage platforms currently in development for the EMC2 midrange group• Verified that current I/O modules on said platforms met industry standards for 100TX and 1000TX Ethernet compliance• In charge of PCI Express Compliance testing for NSX/CX3-80 project• Performed software testing and debug on EMC Celerra and CLARiiON NS700 systems• In charge of multi-vendor mix eight corner environmental testing

May 2004 - Mar 2005

Hardware Design Co-Op

• Worked as a hardware designer in both the hardware and production departments• Created the schematics for a 5 mega-pixel video adapter that went into production • In charge of assembling a digital flat panel medical workstation prototype and preparing it for display at RSNA 2001• Worked extensively in quality control monitoring defects in 3 megapixel and 5 megapixel LCD glass from the supplying manufacturers (IBM and LG)• Discovered and recorded a previously unknown defect in the 3 megapixel glass• Worked in the production lab debugging and reworking all types of video boards in use by our customers• Performed testing and burn-in procedures on entire current product line

Jun 2000 - Dec 2001
1 education record

Jonathan Sprague education

  • Northeastern University
    Northeastern University
    Electrical Engineering
FAQ

Frequently asked questions about Jonathan Sprague

Quick answers generated from the profile data available on this page.

What company does Jonathan Sprague work for?

Jonathan Sprague works for Dell Technologies.

What is Jonathan Sprague's role at Dell Technologies?

Jonathan Sprague is listed as Distinguished Engineer at Dell Technologies.

Where is Jonathan Sprague based?

Jonathan Sprague is based in West Boylston, Massachusetts, United States while working with Dell Technologies.

What companies has Jonathan Sprague worked for?

Jonathan Sprague has worked for Dell Technologies, Teradyne, Dell Emc, and Dome Imaging Systems.

How can I contact Jonathan Sprague?

You can use AeroLeads to view verified contact signals for Jonathan Sprague at Dell Technologies, including work email, phone, and LinkedIn data when available.

What schools did Jonathan Sprague attend?

Jonathan Sprague holds Bsee, Electrical Engineering from Northeastern University.

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