Jonathan Wei Email and Phone Number
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Over 20 years semiconductor engineering and operations experience focusing on new products development, time to market introduction, global manufacturing management including advanced technologies, wafer fabrication, packaging, test development, optimized product yield, quality, reliability, failure analysis, and vendors management. Career emphasis has been on working with R&D to deliver cost effective and high quality new products to meet and ramp rapidly for customers market demand.Keywords: fabless semiconductor supply chain IC manufacturing production product engineering test engineering RFIC ATE system characterization automotive qualification reliability failure analysis COGS COT ASIC turnkey operations logistics shipping fab foundry process 40nm 65nm RFCMOS TSMC GlobalFoundries Samsung IBM ST OSAT ASE STATS Amkor package assembly flip chip WLCSP BGA QFN technology
Cypress Semiconductor Corporation
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Sr. Director Of Product Engineering, Iot BusinessCypress Semiconductor Corporation May 2018 - PresentSan Jose, Ca, Us
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Sr. Director Of Product And Test EngineeringEsilicon Apr 2015 - May 2018San Jose, Ca, UsWorked in Global Manufacturing Operations focusing on new products introduction including Foundry and Packaging Engineering.• Worked with Samsung Foundry and Amkor closely to enable the 2.5D CoS package using Samsung 14LPP and interposer wafers for an enterprise networking server product. • Worked with Samsung and ASE-Kh closely to enable the 2.5D CoW package for another 14LPP high performance and high power networking product using 25G Serdes.• Worked with TSMC to enable the CoWoS package for a 28nm artificial intelligence (AI) product using 4 HBM2 DRAM stacks.• Managed a global product and test engineering team and focused on improving the time to market for ATE test bring up and products characterization. -
Sr. Director Of Manufacturing Engineering, OperationsCsr Jun 2009 - Mar 2015Cambridge, England, GbWorked across the globe to integrate SiRF business and streamline the methodologies including introduction of multiple foundries, OSAT vendors, and ASIC turnkey model to CSR. Focused on TSMC 40nm RFCMOS and SoC including PMU backend new developments and productization. Managing a very efficent team and successfully migrated 65nm SoC from Samsung to GF, and introduced 40nm copper column FCBGA and WLCSP products, to both wireless and automotive markets. Managing multi-million chips manufacturing and with single digit DPM in quarterly basis. -
Sr. Director Of Manufacturing Engineering, OperationsSirf Technology Nov 2003 - Jun 2009UsIn charge of the Product Engineering, Test Engineering, and Packaging Engineering in Operations. Focusing on new product backend development, new product introduction, cost reduction, and manufacturing, including both GPS standalone and SOC product lines, working in global organizations across US, China, India, and Europe. Interfacing with both foundry and backend vendors across the globe. -
Director Of Manufacturing EngineeringGlobespanvirata Sep 2002 - Nov 2003UsIn charge of the whole west coast Operations group. Focusing on new product introduction, managing product and test engineering group and oversea manufacturing activities. -
Product Engineering ManagerVirata Oct 2000 - Sep 2002UsWorked extensively with internal & external resources to establish the COT business model for Virata. Established the business system of ASIC introduction and manufacturing procedures. Worked closely with design team, marketing, fab foundries, backend sub-contractors, tester vendors, etc. for mixed signal ASIC design, manufacturing, test development, and qualification. Helped design team to implement the DFT structures in ASIC and establishing the standard test methodology. -
Senior Product And Test EngineerAdaptec Jan 1996 - Sep 2000UsTechnical lead for product and test engineering group. Worked extensively for ASIC characterization, simulation, pattern generation, test program generation, product introduction, and production sustaining. Worked closely with design, DFT, manufacturing, foundry, reliability, FA, and QA groups in product and test related issues. -
Product EngineerAmd 1993 - 1996Santa Clara, California, UsWorked extensively for EPROM Flash memory characterization, testing, qualification, failure analysis and product introduction. Worked closely with design, technology, testing, marketing, FA, and QA dept. Strong programming ability using Advantest, Megatest and HPL memory test systems. -
Test EngineerBest Ic Laboratory, Inc. 1992 - 1993Worked extensively for SRAM and DRAM memory testing with Advantest 5363, Sentry S90 and Xincom test system. Worked closely with customer to do characterization and failure analysis.
Jonathan Wei Skills
Jonathan Wei Education Details
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Santa Clara UniversityElectrical And Electronics Engineering -
South China Institute Of TechnologyElectrical And Electronics Engineering
Frequently Asked Questions about Jonathan Wei
What company does Jonathan Wei work for?
Jonathan Wei works for Cypress Semiconductor Corporation
What is Jonathan Wei's role at the current company?
Jonathan Wei's current role is Sr. Director of Product Engineering, IOT Business at Cypress Semiconductor Corporation.
What is Jonathan Wei's email address?
Jonathan Wei's email address is jw****@****con.com
What is Jonathan Wei's direct phone number?
Jonathan Wei's direct phone number is +140863*****
What schools did Jonathan Wei attend?
Jonathan Wei attended Santa Clara University, South China Institute Of Technology.
What skills is Jonathan Wei known for?
Jonathan Wei has skills like Semiconductors, Ic, Soc, Asic, Product Engineering, Mixed Signal, Semiconductor Industry, Failure Analysis, Silicon, Test Engineering, Manufacturing, Cmos.
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