Jon Cooper

Jon Cooper Email and Phone Number

Custom IC Methodology Solutions Director – Physical Design @ Cadence Design Systems
Jon Cooper's Location
Mount Airy, Maryland, United States, United States
Jon Cooper's Contact Details

Jon Cooper work email

Jon Cooper personal email

n/a
About Jon Cooper

Management responsibilities for the CIC Methodology Implementation Group Physical Design team. Custom/Analog IC physical design enablement for enterprise customers at FinFET (7,5,3nm) technologies. Drive EDA tool enhancements, develop custom solutions and deliver targeted training to improve FinFET custom/analog physical design efficiency. Development and delivery of Cadence internal advanced node physical design training for the worldwide AE community. Shared responsibilities for managing, developing, and testing advanced node custom design reference flows. Expertise in FinFET EDA tools and methodology. FinFET custom/analog physical design expert including mixed signal interoperability. Services AE of the Year 2020. Creator of the original Methodology Enablement Package (MEP); a set of components to enable efficient assisted and automated device level custom layout functionality.

Jon Cooper's Current Company Details
Cadence Design Systems

Cadence Design Systems

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Custom IC Methodology Solutions Director – Physical Design
Jon Cooper Work Experience Details
  • Cadence Design Systems
    Custom Ic Methodology Solutions Director – Physical Design
    Cadence Design Systems Sep 2020 - Present
    San Jose, California, Us
    Management responsibilities for the CIC Methodology Implementation Group Physical Design team. Custom/Analog IC physical design enablement for enterprise customers at FinFET (7,5,3nm) technologies. Drive EDA tool enhancements, develop custom solutions and deliver targeted training to improve FinFET custom/analog physical design efficiency. Development and delivery of Cadence internal advanced node physical design training for the worldwide AE community. Shared responsibilities for managing, developing, and testing advanced node custom design reference flows. Expertise in FinFET EDA tools and methodology. FinFET custom/analog physical design expert including mixed signal interoperability. Services AE of the Year 2020. Creator of the original Methodology Enablement Package (MEP); a set of components to enable efficient assisted and automated device level custom layout functionality.
    View
  • Cadence Design Systems
    Sr Principal Application Engineer
    Cadence Design Systems May 2016 - Sep 2022
    San Jose, California, Us
    View
  • Cadence Design Systems
    Staff Methodology Services Engineer
    Cadence Design Systems May 2012 - Sep 2022
    San Jose, California, Us
    Develop advanced design methodologies for custom and mixed-signal ICs.
    View
  • Cadence Design Systems
    Principal Applications Engineer, Ams Methodology Services
    Cadence Design Systems May 2002 - May 2012
    San Jose, California, Us
    Develop advanced design methodologies for custom and mixed-signal ICs.
    View
  • Atmel
    Engineering Group Leader - Fpga
    Atmel Jun 1991 - May 2002
    San Jose, Ca, Us
    View
  • Johns Hopkins University Applied Physics Laboratory
    Intern
    Johns Hopkins University Applied Physics Laboratory Jun 1988 - Dec 1988
    Laurel, Maryland, Us
    Intern in the Micro-Electronics lab.
    View

Jon Cooper Skills

Mixed Signal Eda Semiconductors Fpga Asic Mixed Signal Floorplanning Mixed Signal Physical Implementation Methodology Mixed Signal Interoperability Timing Model Generation Static Timing Analysis Timing Driven Digital Physical Implementation Ic Microelectronics Cmos Tcl Analog Soc Vlsi Integrated Circuit Design Physical Design Verilog Physical Verification Analog Circuit Design Lvs System On A Chip Field Programmable Gate Arrays Very Large Scale Integration Application Specific Integrated Circuits Integrated Circuits

Jon Cooper Education Details

  • University Of Maryland Baltimore County
    University Of Maryland Baltimore County
    Emergency Medical Technology/Technician (Emt Paramedic)
  • Rochester Institute Of Technology
    Rochester Institute Of Technology
    Microelectronic Engineering

Frequently Asked Questions about Jon Cooper

What company does Jon Cooper work for?

Jon Cooper works for Cadence Design Systems

What is Jon Cooper's role at the current company?

Jon Cooper's current role is Custom IC Methodology Solutions Director – Physical Design.

What is Jon Cooper's email address?

Jon Cooper's email address is jc****@****nce.com

What schools did Jon Cooper attend?

Jon Cooper attended University Of Maryland Baltimore County, Rochester Institute Of Technology.

What skills is Jon Cooper known for?

Jon Cooper has skills like Mixed Signal, Eda, Semiconductors, Fpga, Asic, Mixed Signal Floorplanning, Mixed Signal Physical Implementation Methodology, Mixed Signal Interoperability, Timing Model Generation, Static Timing Analysis, Timing Driven Digital Physical Implementation, Ic.

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