SoC post silicon validation Engineer (2006~2024)- Experience SoC architecture (ARM)- System debugging (HW/SW defect analysis)- DVFS, Clock, Power management solution development- SW framework architecture for SoC/IP validation & defect screening on mass production- SoC/IP validation (Exynos mobile SoC)- Exynos Closed Loop DVFS solution development- System bus performance analysis & Qos tuning- System Programing, Kernel & Driver on Firmware/Embedded linux/RTOS- C, C++, OOAD