Hardware Engineer
CurrentData center hardware engineering | cloud computing | Memory
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@intel.com
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2 phones found area 626 and 408
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Jongwon Lee is listed as Hardware Engineer at Amazon Web Services (AWS), based in Hillsboro, Oregon, United States. AeroLeads shows a work email signal at intel.com, phone signal with area code 626, 408, and a matched LinkedIn profile for Jongwon Lee.
Jongwon Lee previously worked as Memory Architect and Technologist at Intel Corporation and SOC & IP Design engineer at Intel Corporation. Jongwon Lee holds Master Of Science, Electrical Engineering from Pohang University Of Science And Technology.
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I am a Hardware Engineer at AWS, where I work on data center hardware engineering projects that enable cloud computing and memory solutions for various customers and applications. I have been in this role for over two years, and I have leveraged my extensive experience and expertise in memory pathfinding for LPDDR5 & DDR5/6 & HBM3/4, SOC and IP design, and memory controller design to deliver innovative and optimized hardware systems.Before joining AWS, I spent more than 10 years at Intel Corporation, where I held various positions as a Memory Architect and Technologist, and a SOC and IP Design Engineer. I developed multiple FPGA and SRAM skills, as well as domain expertise in IP memory and memory sub-system power. I was involved in several memory pathfinding projects for LPDDR5 & DDR5/6 & HBM3/4, and I led the SOC power delivery design and the memory controller design for several products. I am passionate about enhancing the performance, reliability, and efficiency of cloud computing and memory technologies, and I value collaboration, learning, and customer satisfaction. I strive to contribute to AWS's mission of delivering the most advanced and scalable cloud services in the world.
Listed skills include Embedded Systems.
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Seattle, Wa, Us
Data center hardware engineering | cloud computing | Memory
Santa Clara, California, Us
SOC Power delivery Design Lead.Memory Sub-System Power Lead.Memory Controller Design.Domain Lead on IP Memory.Hierarchical Memory Controller Design.
Design and verify embedded IP memory portfolio such as SRAM/RF/ROM compiler memory, custom cache memory and fuse array. Solid engineering position collaborating with different groups such as test oriented group and memory controller groups. Low power and high performance transistor-level design with area efficient design methodology.
Icheon, Gyeonggi-Do, Kr
- Direct engineering development processes for researching and developing low power, high speed SDR/DDR/LPDDR2/FMD wide I/O stacked memory using TSV SDRAM circuits in transistor level for mobile products. - Serve as subject matter expert, successfully performing failure analysis at wafer and PKG levels. - Provide critical technical interface in reviewing JEDEC Mobile product specifications proposing new technology for specication. - Skillfully assess project benchmarks through careful exploration and review, and deliver in-depth technical training to teammates.
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Jongwon Lee works for Amazon Web Services (AWS).
Jongwon Lee is listed as Hardware Engineer at Amazon Web Services (AWS).
AeroLeads has found 1 work email signal at @intel.com for Jongwon Lee at Amazon Web Services (AWS).
AeroLeads has found 2 phone signal(s) with area code 626, 408 for Jongwon Lee at Amazon Web Services (AWS).
Jongwon Lee is based in Hillsboro, Oregon, United States while working with Amazon Web Services (AWS).
Jongwon Lee has worked for Amazon Web Services (Aws), Intel Corporation, Qualcomm, and Hynix Semiconductor.
You can use AeroLeads to view verified contact signals for Jongwon Lee at Amazon Web Services (AWS), including work email, phone, and LinkedIn data when available.
Jongwon Lee holds Master Of Science, Electrical Engineering from Pohang University Of Science And Technology.
Jongwon Lee is listed with skills including Embedded Systems.
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