Jose Prado

Jose Prado Email and Phone Number

Senior Hardware Engineer at Amazon Lab126 @ Amazon Lab126
1100 Enterprise Way, Sunnyvale, CA 94043, us
Jose Prado's Location
San Francisco Bay Area, United States, United States
Jose Prado's Contact Details

Jose Prado personal email

About Jose Prado

As a design engineer, I drive to the root of a problem to understand it fully, and achieve optimal solutions. My greatest strength as design engineer is using core fundamentals to tackle different design problem even without prior experience: self-learner, highly self-motivated, puzzle-solver.*20 years of analog IC design experience*Released 15+ audio related products to full production*Worked in a variety of CMOS processes from 0.13 um to 1 um (done some work in 28 nm)*Strong layout skills for planar CMOS process.*Knowledge of power audio amplifier, op amps, PTAT, bandgap, oscillators, etc*Design experience with Class D audio amplifiers, charge pumps, LDO regulator, switched cap circuits, DC-DC converters*Worked on mixed-signal audio codec subsystems and ASICs*Proficient with Cadence schematic/layout/simulation tool chain

Jose Prado's Current Company Details
Amazon Lab126

Amazon Lab126

View
Senior Hardware Engineer at Amazon Lab126
1100 Enterprise Way, Sunnyvale, CA 94043, us
Website:
lab126.com
Employees:
1
Jose Prado Work Experience Details
  • Amazon Lab126
    Senior Hardware Engineer
    Amazon Lab126 Oct 2020 - Present
    Sunnyvale, Ca, Us
  • Knowles Intelligent Audio
    Principal Circuit Design Engineer
    Knowles Intelligent Audio Dec 2015 - Jun 2020
    Mountain View, Ca, Us
    *ASIC for voice wake DSP-Responsible for designing signal path (PGA, AAF, dual audio converter path) and core LDO*Low power, low noise differential PGA IP to interface with acoustic single-ended MEMS microphone-Responsible for designing interfacing amplifier (impedance converter) -Designed common-mode feedback loop and integrated it with interfacing amplifier and high-voltage charge pump to convert singled-ended MEMS into a differential structure.*Helped to improve existing topology for 250 mA DSP LDO (current feedback architecture)*Low power, low noise single-ended analog microphone test chip-Responsible for full design of test chip: PTAT, bandgap generator, high voltage charge pump (11V), singled ended class A/B interfacing amplifier, bi-modal oscillator (4 MHz at startup and 500 kHz at steady state), control and timing logic*Developed test circuit to determine noise impact from biasing circuit on interfacing amplifier
  • Texas Instruments
    Analog Circuit Design Manager
    Texas Instruments Sep 2012 - Nov 2015
    Dallas, Tx, Us
    *Oversaw development of a few projects-Low noise AFE for thermopile sensor array AFE (LMP93601)-Nanopower (sub 500 nA) operational amplifier (LPV542)-Time-to-digital Converter (TDC) AFE for time-of-flight applications in flow metering (TDC7201)-R&D of pressure sensor AFE
  • Texas Instruments
    Staff Analog Circuit Design Engineer
    Texas Instruments Sep 2011 - Aug 2012
    Dallas, Tx, Us
    *Digital input audio codec with headset detection-Responsible for leading a team of analog & digital engineers-Oversaw the development and integration of new IP -Specific design duties: low power PTAT/BGAP block and re-design low-power headphone amplifier -Engaged with cross-functional team members to develop project. *Multi-level step down regulated charge pump (CP) for headphone jack-2V, 30 mA regulated charge pump [supply range: 2.7V to 5.5V @ 500 kHz] -Maximized power efficiency vs input voltage CP (conversion ratios of 1/2, 2/3, and a bypass mode).
  • National Semiconductor
    Staff Analog Circuit Design Engineer
    National Semiconductor Sep 2000 - Sep 2011
    *Output current sense for Class D amplifier -Design circuit to sense dynamic Class D load current. *Automatic Level Control (ALC) for class D audio application (LM49151) -Low distortion (< 0.3%), fully analog control loop which performs 3 functions: 1) voltage limiter 2) output clipping prevention (saturation of class D outputs), and 3) clipping control function (allowed different levels of THD before circuit became active). -US Patent # US8030996 B1 [Apparatus and method for automatic level control]*Unregulated inverting charge pump in a 1.8V, 0.18 um CMOS process to supply negative rail for stereo HP amplifier application.

Jose Prado Skills

Analog Circuit Design Ic Analog Mixed Signal Asic Semiconductors Soc Cmos Semiconductor Industry

Jose Prado Education Details

  • Florida Institute Of Technology
    Florida Institute Of Technology
    Electrical Engineering

Frequently Asked Questions about Jose Prado

What company does Jose Prado work for?

Jose Prado works for Amazon Lab126

What is Jose Prado's role at the current company?

Jose Prado's current role is Senior Hardware Engineer at Amazon Lab126.

What is Jose Prado's email address?

Jose Prado's email address is ja****@****hoo.com

What schools did Jose Prado attend?

Jose Prado attended Florida Institute Of Technology.

What skills is Jose Prado known for?

Jose Prado has skills like Analog Circuit Design, Ic, Analog, Mixed Signal, Asic, Semiconductors, Soc, Cmos, Semiconductor Industry.

Who are Jose Prado's colleagues?

Jose Prado's colleagues are Gus Nguyen, Franky Beard, Bah Souleymane, Allie Y., Janoth Raveendrarajah, Rohit Bhapkar, Devis Plaku.

Free Chrome Extension

Find emails, phones & company data instantly

Find verified emails from LinkedIn profiles
Get direct phone numbers & mobile contacts
Access company data & employee information
Works directly on LinkedIn - no copy/paste needed
Get Chrome Extension - Free

Aero Online

Your AI prospecting assistant

Download 750 million emails and 100 million phone numbers

Access emails and phone numbers of over 750 million business users. Instantly download verified profiles using 20+ filters, including location, job title, company, function, and industry.