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Omkar Joshi Email & Phone Number

Analog design engineer at Intel at Intel Corporation
Location: San Francisco Bay Area, United States 12 work roles 2 schools
1 work email found @qualcomm.com LinkedIn matched
✓ Verified July 2026 4 data sources Profile completeness 100%

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Current company
Role
Analog design engineer at Intel
Location
San Francisco Bay Area, United States
Company size

Who is Omkar Joshi? Overview

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Omkar Joshi is listed as Analog design engineer at Intel at Intel Corporation, a with 10 employees, based in San Francisco Bay Area, United States. AeroLeads shows a work email signal at qualcomm.com and a matched LinkedIn profile for Omkar Joshi.

Omkar Joshi previously worked as Analog Design Engineer at Intel Corporation and Analog Design Engineer at Qualcomm. Omkar Joshi holds Master'S Degree, Electrical And Electronics Engineering from Ira A. Fulton Schools Of Engineering At Arizona State University.

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Email format at Intel Corporation

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{first_initial}{last}@qualcomm.com
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Profile bio

About Omkar Joshi

Analog and mixed signal IC design engineer with experience in PMIC, High speed IO design.

Listed skills include Analog Circuit Design, Very Large Scale Integration, Semiconductor Device, Integrated Circuits, and 28 others.

Current workplace

Omkar Joshi's current company

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Intel Corporation
Intel Corporation
Analog design engineer at Intel
(408) 765-8080
Website
Employees
10
AeroLeads page
12 roles

Omkar Joshi work experience

A career timeline built from the work history available for this profile.

Analog Design Engineer

Current

Santa Clara, California, Us

HSIO design for IFS.

Apr 2024 - Present

Analog Design Engineer

San Diego, Ca, Us

Jan 2020 - Apr 2024

Research Assistant

Tempe, Az, Us

•Working towards a Thesis efficient High conversion ratio buck regulators using GaN Power FETs and SuperJunction device driver for Radioactive environment-Selected “Constant ON Time” converter topology after analyzing different converter solutions based on performance, area and stability constraints.-Evaluated feasibility of GaN deadtime and SuperJunction devices for their use in Driver inverter design. -Designed and implemented driver shoot-through protection circuit, precise voltage positioning scheme and Transient enhancement circuit for improving output accuracy.

Jan 2019 - Jan 2020

Graduate Teaching Assistant

Tempe, Az, Us

Lab Teaching assistant for EEE 202 (Circuits I) online course.

Aug 2018 - Jan 2020

Analog Design Intern

San Diego, Ca, Us

PMIC design team.•Delivered a robust C-fly voltage sensing circuit design for a 3-level buck converter application.•Performed study, design and analysis of multiple topologies and evaluated them for power, performance and area.•The final design can operate for an input supply range of 5-22Vandacross PVTin all switching phases with minimal trim.

Jun 2019 - Aug 2019

Analog Design Intern

Tempe, Az - Arizona, Us

• Working on Radiation hardened, EPC GaN switch based High speed and large conversion ratio buck converter IC for CERN.• Part of the team responsible for designing, validating, taping out and testing prototype buck converter IC to work as a compact POL solution in a radioactive environment of 200Mrads sufficient to induce Vt shifts (threshold voltage) of 150mV in NMOS and 150-300mV in PMOS (including LDMOS device), degrade gm (transconductance) by 50%, induce high leakage current at low voltages etc.• Evaluated radiation effects such as TID, SET, Displacement damage on the analog controller components and came up with architectural and design changes to mitigate the effects. • Designed a low offset, highly stable bandgap reference using DTMOST device and using novel offset mitigating techniques, all CMOS Ramp generator and comparator for space and high energy environments.

May 2018 - May 2019

Graduate Teaching Aide - Physics Ii (Phy 151)

Tempe, Az, Us

Laboratory teaching Aide in Department of Physics, Arizona State University- Conducted Physics II (PHY 151) laboratory sessions for sophomore physics students.- Undertook interactive discussion with students to explain the theoretical and practical concepts of the experiment.- Explained the procedure for performing the experiments successfully.- Encouraged students to critically think, analyze and debug the problems encountered during an experiment.- Graded the lab reports based on multiple parameters from grading rubric and gave feedback to students on their performance.

Jan 2018 - May 2018

Graduate Teaching Assistant - Eee 352 Properties Of Electronic Material

Tempe, Az, Us

Lab TA for EEE 352 - Properties of Electronic Material I will be conducting following labs for the class:-Resistivity measurement of Silicon wafer with ITO coating.-Schrodinger's equation for infinite and finite wells.-Photospectrscopy for Bandgap measurement of Silicon wafer.-Electron mobility and hole conductivity measurement in ITO and IZO samples using Hall effect in semiconductors.-Characteristics of p-n junction.My responsibility includes conducting the lab, grading the lab reports and solving student's doubts.

Jan 2018 - May 2018

Tutor

Tempe, Arizona, Us

• Mentored students for subjects in fields of electrical engineering like EEE 202 - Circuits I, EEE 334 -Circuits II, EEE 335 -Analog and Digital Circuits, EEE 352 -Properties of Electronic Material, PHY 111, MAT 170 etc. • Assisted students in resolving their queries by relating to different examples.• Facilitated in groups to guide students in large numbers at a time to clarify their problems.• Encouraged students to work in teams to increase their knowledge and to help each other.

Oct 2017 - Jan 2018

Undergraduate Research Assistant

Mumbai - 400 058, Maharashtra, In

▪ Worked under Professor Narendra Bhagat on research topic- Current Mode Communication Circuits using Current Conveyor.▪ Designed and implemented current mode FSK circuits in HF communication using Current Conveyor and Current Feedback Operational Amplifier simulated using TSMC 180nm technology node and AD844 CFOA IC in HSPICE▪ Used TSMC 180nm CMOS technology for simulation of 2nd generation current controlled current conveyor (CCCII), Current Feedback Operational Amplifier, Sallenkey Bandpass Filters, Comparators and Subtractor circuits▪ Modelled FSK receiver using AD844 CFOA IC and compared results from Current mode and Voltage mode operation

May 2016 - Jul 2017

Undergraduate Research Assistant

Mumbai - 400 058, Maharashtra, In

▪ Worked under Prof. Reena Sonkusare on topic- 30nm High K Metal Gate Oxide FinFET based OTA, Instrumentation Amplifier design & optimization ▪ Designed two stage miller compensated OTA and In-Amp using FinFET devices in saturation and subthreshold region▪ Used two different 30nm FinFET pdk -1) BSIM-CMG, Berkeley, 2) HfO2 gate oxide FinFET designed in Visual Tcad▪ Achieved 96 dB gain, 580MHz unity gain bandwidth, 117dB CMRR, 92dB PSRR+ at supply voltage ±0.8V for instrumentation amplifier in subthreshold region

Jan 2016 - May 2017

Internship

The internship was on ‘Embedded Systems and Wireless Communication’. We started off with soldering and Printed Circuit Board design. I was introduced to a number of microcontrollers and microprocessors along with their applications in the real world. I then studied architecture and programming of AVR and 8051 microcontrollers and MSP, ARM and DSP microprocessors to explore the potential of these microcontrollers and microprocessors. The programs that we did included the programming of peripherals like LEDs, LCD, ADC, DAC, Serial, UART, I2C, SPI, PWM, Timers, Stepper motors, DC motors, Infrared Sensors, Servo Motors, HALL Sensors, Temp sensor LM35, Bluetooth Module which were interfaced with the above mentioned microcontrollers and microprocessors. I also explored the various simulation softwares which included Proteus and TINA.

May 2015 - Aug 2015
Team & coworkers

Colleagues at Intel Corporation

Other employees you can reach at intel.com. View company contacts for 10 employees →

2 education records

Omkar Joshi education

Master'S Degree, Electrical And Electronics Engineering

Ira A. Fulton Schools Of Engineering At Arizona State University

Bachelor Of Engineering - Be, Electrical, Electronics And Communications Engineering

Bharatiya Vidya Bhavans Sardar Patel Institute Of Technology
FAQ

Frequently asked questions about Omkar Joshi

Quick answers generated from the profile data available on this page.

What company does Omkar Joshi work for?

Omkar Joshi works for Intel Corporation.

What is Omkar Joshi's role at Intel Corporation?

Omkar Joshi is listed as Analog design engineer at Intel at Intel Corporation.

What is Omkar Joshi's email address?

AeroLeads has found 1 work email signal at @qualcomm.com for Omkar Joshi at Intel Corporation.

Where is Omkar Joshi based?

Omkar Joshi is based in San Francisco Bay Area, United States while working with Intel Corporation.

What companies has Omkar Joshi worked for?

Omkar Joshi has worked for Intel Corporation, Qualcomm, Arizona State University, Alphacore Inc., and Ira A. Fulton Schools Of Engineering At Arizona State University.

Who are Omkar Joshi's colleagues at Intel Corporation?

Omkar Joshi's colleagues at Intel Corporation include Ivan Greenberg, Miya Gong, Mohana Priya Jayasekaran, Gil Levkovich, and Ido Barkai.

How can I contact Omkar Joshi?

You can use AeroLeads to view verified contact signals for Omkar Joshi at Intel Corporation, including work email, phone, and LinkedIn data when available.

What schools did Omkar Joshi attend?

Omkar Joshi holds Master'S Degree, Electrical And Electronics Engineering from Ira A. Fulton Schools Of Engineering At Arizona State University.

What skills is Omkar Joshi known for?

Omkar Joshi is listed with skills including Analog Circuit Design, Very Large Scale Integration, Semiconductor Device, Integrated Circuits, Semiconductors, C, Integrated Circuit Design, and Python.

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