Judy Gilmore Email and Phone Number

- Laser Electronics IPTL transitioning program to Agile Management using JIRA and confluence tools to respond to need for accountability and progress- I&T IPTL and Interim Pod & Infrastructure IPTL during Program start up; generating waterfall and agile IMS linking and resource loading, supported Supply Chain for SOW and Single Source for critical vendor contract, presented Integration Flow at customer kickoff for podded prototype demonstration system.- CRAD Program IPTL leading transition from Module to Subsystem program phase with a successful completion of receive and transmit demonstration of prototype RF sensor- IRAD SEIT IPTL leading new team of Engineers to quickly start up new program effort to generate a set of baseline system and subsystem requirements to provide official program ability to quickly launch hardware procurement efforts- Responsible Systems Engineer (RSE) providing the infrastructure, behavior and interfaces required for implementing new Mode; First to employ Cameo tools to efficiently communicate mode behavior and requirements on portfolio program.

• IPTL/CAM for Advanced Technologies RF leading Firmware, Software, Calibration, SE and I&T teams to conduct a functional lab demonstration with next generation front end RF sensor• Transitioned Firmware, Software, Systems and Integration teams to Agile methodology using JIRA, Confluence and Bitbucket in second phase of CRAD program•EMI Test lead for preparing an RF system for EMI RE 102 and CE 102 tests in a classified lab environment.•Integration lead coordinating, prioritizing and facilitating Integration meetings between 4 contending entities, and test assets for space and time on one or two test stations.• Verification lead amassing technical Verification artifacts for 164 requirements from various disciplines to support a product leading into production• Flight Test Plan lead author in declaring needed assets, test schedule, mission objectives and methods for flight demo tests of R&D programs. Coordinating with customer, program, and test platform groups to come up with realistic and verifiable flight plans.• Served as interim LSE and SEIT IPTL for 6 months. Provided Program and Function Review charts contain EV and Risk and Opportunity metrics.• Led and presented Delta CDR incorporating new scope to customer• Guided Hardware and Software teams to refine their requirements and verification methods• Supported Flight demos, lab demos, field test demos and ground test demos on various IRAD programs as well as first article system sell off for programs leading to production line

• Authored White Paper on Laser Targeting logic and presented to customer• Hardware Systems Engineer who develops Interface Control Drawings, hardware requirements for research and development prototype systems that contain servo-electronics, lasers, processors, timing chassis, chillers and other subsystems that will be demonstrated on various test vehicles in air or on ground. • Established DOORS database and generated requirements for new program• Used Mentor Graphics to design and layout prototype electrical Circuit Cards • Provided grounding schemes for unit level and system level designs• Performed essential roles of Electrical Engineer Lead, Systems Hardware RE, and systems engineer on tightly budgeted programs.• Interfaced with flight crew to ensure interface compatibility with regards to safety and operation of system while in flight• Developed subsystem test plans to ensure each unit is able to function as intended when integrated into the larger system• Continue to provide hands-on and innovative solutions to work around schedule, budget and material constraints

Guest Lecturer for UCLA EECE 1 class sharing the details of what adventures in engineering are possible

• Project lead to design, build and integrate a Payload Early Integration Test Bed (PEIT) for SBIRS overcoming resource contention issues with competing entities.• Conducted Critical and Performance Design Reviews for PEIT phase approval• Designed PEIT for robustness, scalability, cost, design reuse, modularity and space optimization consisting of 141 cable drawings with 119 new cable drawings resulting in only 2 pairs of wiring needing to be swapped showing excellent technical rigor in the initial and design review process.• Designed Power On Warning System for STE Payload Test Sets.• Analyzed and presented solution for various test set configurations due to unit upgrades.• Presented options for doing in-place Calibration for various STE racks• Interim Project lead analyst for ground test sensor testing

• Responsible engineer to design a unit that controls the Stabilized Sensor Unit (SSU) for a DARPA program.• Worked closely with Systems Engineering and SSU engineers to come to system and subsystem design solutions and requirements.• Stepped in to help fellow engineers to meet scheduled milestones.• Work products include Preliminary and Critical Design Reviews presentations, Design Specs, Mechanical drawings, Schematics and Assembly drawings of the Circuit Card modifications and harnessing within the unit.

• Authored requirements document for a Logic Controller CCA.• Designed and built an engineering test box in 4 weeks for a Logic Controller CCA• Developed Requirement and Verification Matrix for Focal Plane Interface Electronics for a space programusing DOORS.

• Incorporated COTS part into product during Full Rate Production without impacting schedule• Communicated and collaborated with a team of seven engineers and technicians to provide production support for a major electro-optical production pod program to meet delivery schedules.• Used analytical and diagnostic skills to determine laser integration failures and provide appropriate corrective action.• Interfaced with manufacturing, mechanical, optical, and other groups to develop comprehensive solutions.• Performed Return On Investment analysis and presented at Failure Review Board, to obtain funding for engineering tools.• Provided field test support in China Lake.• Also served as Acting Laser Test Engineering Lead: Instigated case studies for failure analysis and implemented processes and tools to stop a failure trend.

• Participated in the design and implementation process of bringing a product from an EngineeringDevelopment Module to Full Rate Production• Designed Test Boxes to test prime hardware.• Responsible for troubleshooting the logic control board that controlled critical functions such as receiver biasing, range processing, the timeline for PFN charging and monitoring general housekeeping data.• Troubleshot laser issues as a stand-alone unit and as an integrated part of the ATFLIR pod by analyzing signal waveforms and/or PASS 1000 data.• Wrote an excel macro to process raw data coming from the laser in order to better characterize and identify failures that occur.• Wrote Engineering Change orders to correct assembly errors, schematic errors, and provide rework instructions.• Became the range go-to engineer to handle issues dealing with range accuracy. Used MATLAB to analyze range algorithm.

Responsible Engineer for Yaw Stability Augmentation System (YSAS) test readiness. Produced test procedure and documentation of the YSAS test fixture. Assisted with customer issues.