Jun Fang

Jun Fang Email and Phone Number

Senior Principal System Engineer @ CesiumAstro
San Jose, CA, US
Jun Fang's Location
San Jose, California, United States, United States
Jun Fang's Contact Details

Jun Fang work email

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About Jun Fang

Senior Principal System Engineer with a demonstrated history of working in the telecommunications industry (commercial communication satellites and wireless cellular systems). He has in-depth knowledge in 5G NR, 4G-LTE, and 3G-CDMA and also IEEE 802 including 11ac/ax/ad/ay, with solid experience in 3GPP standards. He has worked in systems from antennas, RF AFE/DFE, PHY/MAC/L3 algorithms, simulation and validation, hardware architecture, up to implementation and tests. He has a Ph.D. from Telecom Paris Tech (ENST Paris), in Communication Theory and Systems, specialized in Information Theory and Coding Techniques. Having worked with Alcatel Space (satellite modems), Cadence Design System (RF transceiver architectures), Space System Loral (payload systems), and several startups in satellite communication systems and wireless technologies (cellular and Wi-Fi), he has worked in RF system and in advanced digital signal processing. He is inventor of 8 granted ICT patents, and 4 recent granted US Patents, and several more in pending. His technical field includes satellite and wireless communication systems and automotive radar systems.

Jun Fang's Current Company Details
CesiumAstro

Cesiumastro

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Senior Principal System Engineer
San Jose, CA, US
Website:
cesiumastro.com
Employees:
313
Jun Fang Work Experience Details
  • Cesiumastro
    Cesiumastro
    San Jose, Ca, Us
  • Xona Space Systems
    Principal Communication System Engineer
    Xona Space Systems Aug 2022 - Dec 2023
    San Mateo, Ca, Us
    LEO constellation GNSS (Global Navigation Satellite System) signals design and performance evaluation, advanced error control coding in data channels, spectrum spreading waveform, synchronization algorithms, link budget analysis, interference analysis,radio frequency system level design and analysis. One patent.
  • Broadcom Inc.
    Senior Principal System Engineer
    Broadcom Inc. Jul 2021 - Apr 2022
    Palo Alto, California, Us
    5G Analog-mixed-digital front-end architecture in chip design and verification, multi-channel timing calibration, transceiver performance analysis and interference mitigation in Carrier Aggregation mode, DVT (Design Verification Testing) for high speed ADC/DAC, and 3GPP LTE/NR RF/RRM (Radio Resource Management) testing methodology, test cases design and solution 1 non-provisional patent filing
  • Metawave
    Senior Principal System Engineer
    Metawave Oct 2017 - May 2021
    5G NR FR2 System Design. Phased Array and Virtual Array Algorithms. New Automotive Radar Systems with Interference Resistance.
  • Encore Semi
    Senior Dsp Architecture Designer
    Encore Semi Sep 2017 - Oct 2017
    San Diego, Ca, Us
    5G Radio Front-End Signal Processing
  • Ssl (Space System Loral) Satellite Payload Engineering, Rf, Dsp, Link Budget, Etc.
    Principal System Engineer
    Ssl (Space System Loral) Satellite Payload Engineering, Rf, Dsp, Link Budget, Etc. Jun 2012 - Feb 2017
    Design and performance engineering in support of marketing and sales (proposal activities), and new product R&D with digital signal processing and high speed data convertion as well RF system analysis and design, for commercial communication satellites.Payload design of commercial communication satellites- C-band, Ku-band and Ka-band payload design and performance analysis for proposal activities- Development and training of analysis tools including spur analysis, gain-loss level distribution, MPT (Mass, Power and Thermal), etc., using Matlab and MS VBA (Visual Basic for Applications)Satellite digital payload R&D- Direct sampling receiver and direct synthesis transmitter design using Gsps wideband ADC/DAC- Digital channelization filter bank with application to digital satellite payload- RF front-end incl. solutions to key issues such as phase noise characterization, aggregation, and integration for satellite payload frequency generation, and multiport Power amplifier (MPA)- Resource management design and requirement specification (SDN and NFV, PEP, IP protocols, etc.)- Switching network design and digital beamforming network design based on switching network theory for ASIC and FPGA implementation with one patent application- 4 patents granted (US9882632, US9917623, US10200922, US10284283)
  • Rits (Research Institute Of Tsinghua University In Shenzhen)
    Director Of Laboratory
    Rits (Research Institute Of Tsinghua University In Shenzhen) Mar 2009 - Mar 2012
    Research in 4G Celullar LTE-Advanced technology and standard development (Project Leader). - Multiple Access in IMT-A network system (project leader and manager)- Intercell interference cancellation, design and development of hardware platform for proof of concept demo, L2S mapping based simulation for performance evaluation- TD-LTE network planning technology - PTP product line (modulation and coding solution)- MU-MIMO, CoMP and Carrier Aggregation- 2 patents developed and pending
  • Cadence Design Systems
    Sr. Member Of Consulting Staff
    Cadence Design Systems Apr 2006 - Nov 2008
    San Jose, California, Us
    Wireless RF-analog-digital system design and testing in Kit & Solution Development Division- Responsible in RFFE system architectural specification, simulation and testing for Cadence’s product “RF Kit” (elected as one of the “Product of the year” of 2007 by EDN magazine)- Conception and implementation of level diagram tool for RFIC dynamic RF budgeting analysis- platform using Simulink-Virtuoso simulators (Spectre-RF and AMS-Designer) for RFFE circuit design and verification by co-simulation- IEEE 802.11b PHY-MAC design kit development (VHDL) Received an "Organizational Award"
  • Technoconcepts
    Principal System R&D Engineer
    Technoconcepts Sep 2005 - Apr 2006
    - Advanced digital signal processing (multi-rate DSP)- RF system specification research and development, algorithm design with Matlab simulation - RF-mixed-digital ASIC design and verification
  • Linkair Communications, Usa
    Vp Of R&D And Standard
    Linkair Communications, Usa Aug 2001 - Mar 2005
    - Advanced CDMA system specification research and development and 3GPP2 activities- Wireless system design (IP-based services and applications): prototyping, field trial, demo- System level solution design and promotion for specific customers with wireless Internet access- Advanced channel coding (leading a team in successful Turbo Product Coding IC products development, from FPGA to an ASIC in CMOS 0.18um using Synopsys design flow)
  • Alcatel Space / Thales
    Principal System Engineer/Group Manager
    Alcatel Space / Thales Jan 1991 - Jun 2001
    Senior Principal Staff Satellite System Engineer (Grade A3), and Manager of Spatial Transmission Group- Modem and FEC product research, specification development (QPSK/8PSK/16-QAM, RS+VD, Turbo coding, etc.), involved in several contracted projects Intel-1188, Race-II Flash-TV- Satellite multimedia communication systems, satellite rural telephone system, DTV transmission via satellite, ATM, Intelsat IDR/IBS - Design and specification (proposed air interface solution to SkyBridge system, for both forward and return links with original block Turbo codes solution)Consultative activities with Alcatel Espace in on-board memory coding solution and with Alcatel Submarine in optic fiber FEC solution- Inventor of 8 granted PCT patents
  • Shanghai Jiao Tong University
    Associate Professor
    Shanghai Jiao Tong University Sep 1987 - Oct 1990
    上海, Shanghai, Cn
    - Researching in Error Correcting Coding techniques- 2 Mbps Soft Decision Viterbi hardware decoder design under contract with Ministry of Post & Telecommunication; - Unequal Error Protecting Coding under Chinese NSF grant;- Teaching a master degree course: Information Theory and Coding Techniques, with publication of a textbook “Information theory and coding techniques”, Beijing, Electronic Industry Press, September 1994, ISBN7-5053-2455-1 TP.722

Jun Fang Skills

Cellular Communications Product Management Wireless Rf Telecommunications Algorithms Mobile Devices Umts 4g Lte Cdma Semiconductors Matlab Code Division Multiple Access Method Digital Signal Processors Radio Frequency Simulations Wireless Technologies

Jun Fang Education Details

  • Télécom Paris
    Télécom Paris
    Signal Processing And Coding Theory
  • Shanghai Jiao Tong University
    Shanghai Jiao Tong University
    Ee

Frequently Asked Questions about Jun Fang

What company does Jun Fang work for?

Jun Fang works for Cesiumastro

What is Jun Fang's role at the current company?

Jun Fang's current role is Senior Principal System Engineer.

What is Jun Fang's email address?

Jun Fang's email address is ju****@****hoo.com

What is Jun Fang's direct phone number?

Jun Fang's direct phone number is +140868*****

What schools did Jun Fang attend?

Jun Fang attended Télécom Paris, Shanghai Jiao Tong University.

What are some of Jun Fang's interests?

Jun Fang has interest in Children, Economic Empowerment, Civil Rights And Social Action, Politics, Education, Environment, Poverty Alleviation, Science And Technology, Disaster And Humanitarian Relief, Human Rights.

What skills is Jun Fang known for?

Jun Fang has skills like Cellular Communications, Product Management, Wireless, Rf, Telecommunications, Algorithms, Mobile Devices, Umts, 4g, Lte, Cdma, Semiconductors.

Who are Jun Fang's colleagues?

Jun Fang's colleagues are Hector Calar, Eric Ruhl, Vera C., Anthony Dragotta, Chad Daugherty, Janet Bawcom, Matthew Neville.

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