Jun Tan Email & Phone Number
@ibm.com
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Who is Jun Tan? Overview
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Jun Tan is listed as 高级经理 at 清微智能, a with 18 employees, based in Pudong, Shanghai, China. AeroLeads shows a work email signal at ibm.com and a matched LinkedIn profile for Jun Tan.
Jun Tan previously worked as timing signoff leader/manager at Alibaba Group and SMTS at Globalfoundries. Jun Tan holds Master, Microelectronics from Fudan University.
Email format at 清微智能
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AeroLeads found 1 current-domain work email signal for Jun Tan. Compare company email patterns before reaching out.
About Jun Tan
Specialties: ASIC design, P&R , STAFamiliar with FPGA and FPGA software systemTcl, Perl, C, C++
Listed skills include C++, C, Perl, Tcl, and 5 others.
Jun Tan's current company
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Jun Tan work experience
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Timing Signoff Leader/Manager
CurrentSmts
CurrentTaped out 5 chips at 7nm , 14nm FinFet technology nodes and 32nm, 22nm FDSOI . Master STA analysis and physical implementationHands-on experience on TOP/block level physical implementation and timing analysis/closure.Have deep understanding of ASIC design methodology. Hands-on Methodology architect and development experience for the whole 22nm FDSOI physical implementation flow on ICC2 and Innovus. Very good at scripting .Master… Show more Taped out 5 chips at 7nm , 14nm FinFet technology nodes and 32nm, 22nm FDSOI . Master STA analysis and physical implementationHands-on experience on TOP/block level physical implementation and timing analysis/closure.Have deep understanding of ASIC design methodology. Hands-on Methodology architect and development experience for the whole 22nm FDSOI physical implementation flow on ICC2 and Innovus. Very good at scripting .Master Innovus/ICC/PT/Calibre2018-2019 CEO Award Show less
Advisory Chip Design Engineer
STA / Physical Implementation, Full chip timing owner and block physical designer.
Sr. Asic Design Engineer
Taped out 4 28nm GPU chip.Took the role as a Block Owner, both physical design and timing closure.Block PD Leader, Full chip timing ownermaster ICC, PT, Encounter, Calibre, Olympus
Asic Design Engineer
IBM 2008/07 till nowTapped out 4 OEM chips (65nm to 22nm) in past 3 years, 2 chips on goingphysical design and methodology developmentfullchip timing,focus on timing analysis and closure
Jun Tan education
Master, Microelectronics
Bachelor, Communication Engineering
Frequently asked questions about Jun Tan
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What company does Jun Tan work for?
Jun Tan works for 清微智能.
What is Jun Tan's role at 清微智能?
Jun Tan is listed as 高级经理 at 清微智能.
What is Jun Tan's email address?
AeroLeads has found 1 work email signal at @ibm.com for Jun Tan at 清微智能.
Where is Jun Tan based?
Jun Tan is based in Pudong, Shanghai, China while working with 清微智能.
What companies has Jun Tan worked for?
Jun Tan has worked for 清微智能, Alibaba Group, Globalfoundries, Ibm, and Amd.
How can I contact Jun Tan?
You can use AeroLeads to view verified contact signals for Jun Tan at 清微智能, including work email, phone, and LinkedIn data when available.
What schools did Jun Tan attend?
Jun Tan holds Master, Microelectronics from Fudan University.
What skills is Jun Tan known for?
Jun Tan is listed with skills including C++, C, Perl, Tcl, Asic, Fpga, Static Timing Analysis, and Linux.
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