SystemC Simulation- Developed tests covering corner cases for the switch system inspecting for uncongested throughput, packet integrity, and unique module behaviors- Validated timing of packets passing through each component of the switch system providing nanosecond accurate simulations comparable to hardware implementation- Utilized inheritance, polymorphism, and templates to expand the system c library functionalitiesHardware Implementation- Constructed an integrity checks module to permit specific packets through the switch and recorded dropped packets into a statistics register space- Optimized traffic shaping module using an FSM to ensure packets allowed through the system within a specified time frame while preserving AXI protocol- Pipelined a CRC32 hashing algorithm to allow seamless hashing without interfering with throughput- Formed robust unit tests for each module created using the Vivado simulator and integrated into a CI pipeline- Enhanced timing performance and area utilization to fit more statistic registers and memoryHardware Verification- Designed regression tests for each module of the system using shell scripting, python, and iPerf to generate UDP packets and confirm unchanged data transmitting through the switch

Image Signal Processing Testing- Recovered dead pixels using Xylon’s Image Signal Processing Pipeline- Created automated test scripts for collecting several test images and data simultaneously- Investigated color correction algorithms for properly calibrating color correction matrix- Evaluated data through an RGB histogram and employed research findings to construct a candidate color correction algorithm

Electrical Engineering Co-op Intern- Repaired a PCB involving crimping and soldering used to measure latency for cameras- Examined camera lenses through procedural testing and minimized latency of streams- Brought up Linux-based embedded SOM with neural-network GPU engine- Tested characterization and software driver prototyping for sensing elements for UGV pose-estimation