I am a passionate FPGA/RTL Design Engineer with 3 years of experience in designing and implementing high-performance hardware solutions. My expertise spans RTL design, hardware-software co-design, and FPGA development, specializing in platforms like Xilinx (Artix 7, Zynq UltraScale+ MPSoC) and Lattice (MachXO2).Throughout my career, I have worked on complex systems involving interfaces like PCIe, Ethernet, USB, DDR3, I2C and UART, delivering optimized and reliable designs for a range of industries. My proficiency in tools like Vivado, Lattice Diamond, ModelSim and Vitis enables me to create efficient RTL code, perform system-level debugging, and ensure seamless integration across hardware and software.Key Achievements:Successfully developed high-performance FPGA designs for vision systems, smart devices, and automotive platforms.Delivered projects on-time by independently managing all aspects of FPGA design and development.Conducted device feasibility analysis and supported hardware teams with schematic reviews, ensuring robust system performance.Provided customer support and knowledge transfer to teams, ensuring smooth project transitions.I am passionate about pushing the boundaries of FPGA technology to solve complex engineering challenges. Whether it’s optimizing RTL code, enhancing system interfaces, or ensuring device-level efficiency, I bring dedication and technical expertise to every project.Technical Skills:Languages: Verilog, VHDL, CPlatforms: Xilinx, LatticeInterfaces: PCIe, DDR3, Ethernet, USB, I2C, UART, QSPITools: Vivado, Vitis, Lattice Diamond, ModelSim, Petalinux, Lattice Reveal AnalyzerExpertise Areas: RTL Design, FPGA Development, SoC Integration, High-Performance InterfacesOutside of work, I have a passion for organizing and managing events. I have successfully led teams and coordinated various technical and non-technical events, showcasing my leadership qualities.Feel free to reach out if you’re looking for a committed engineer with a proven track record of delivering innovative solutions in FPGA and RTL design.