Karan Modi

Karan Modi Email and Phone Number

Principal Member of Technical Staff at Oracle Cloud Infrastructure. @ Oracle
Karan Modi's Location
San Jose, California, United States, United States
Karan Modi's Contact Details

Karan Modi personal email

n/a
About Karan Modi

Karan Modi is a Principal Member of Technical Staff at Oracle Cloud Infrastructure. at Oracle. They possess expertise in microcontrollers, electronics, automation, robotics, embedded c++ and 42 more skills.

Karan Modi's Current Company Details
Oracle

Oracle

View
Principal Member of Technical Staff at Oracle Cloud Infrastructure.
Karan Modi Work Experience Details
  • Oracle
    Principal Member Of Technical Staff
    Oracle Sep 2024 - Present
    Austin, Texas, Us
  • Oracle
    Senior Member Of Technical Staff
    Oracle Jan 2022 - Sep 2024
    Austin, Texas, Us
  • Oracle
    Member Of Technical Staff
    Oracle Feb 2020 - Jan 2022
    Austin, Texas, Us
    Working on developing virtual cloud network data plane solution for Oracle Cloud Infrastructure. Delivering high-speed packet processing architectures and other distributed systems that provide networking features such as TCP/UDP packet processing, access controls, metrics and monitoring dashboards.
  • Ta Instruments
    Senior Embedded Software Engineer
    Ta Instruments Jun 2018 - Feb 2020
    New Castle, De, Us
    Lead firmware development of a real-time system designed for thermal analysis of materials. Typical system development includes developing FreeRTOS based firmware for sensing/actuating modules and a Linux based C++ application that performs conditioning, filtering and aligning of the realtime sensor data coming from the modules over CAN interface and also acts as a procedure manager of the analysis to be run. Developing the next generation connected systems by incorporating AWS IoT C++ SDK into the existing code base and migrating the code to a faster Cortex M7 platform using HAL and CMSIS
  • University Of Pennsylvania
    Embedded Systems Research Programmer At Precise
    University Of Pennsylvania Jan 2017 - May 2018
    Philadelphia, Pa, Us
    Working on improving the tool used to perform run time verification of software by constructing and deploying monitors based on an architecture specification. Monitor logic and patterns of communication between monitors are specified in a language SMEDL.
  • Medlogiq
    Embedded Software Developer Intern
    Medlogiq May 2017 - Aug 2017
    My work involved development of embedded software for Generic Infusion Pump (GIP). I was working on GIP Maintenance Chip project aimed at developing run time verification environment using VAT kernel (MAHLE) that will help reduce Infusion pump failures by analyzing the Infusion pump state machine patterns and sensor data in real time that lead to failures and then using that data to predict if an Infusion pump is about to produce a fault in near future.The tasks involved writing device drivers for the GIP, integrating VAT kernel with GIP source code, addition of new sensors to improve data set used for learning and connecting the GIP to Cloud. Since GIP is a real time device understanding and working with real time application,ensuring software reliability and determinism was of critical importance as any failure of software can prove to be life threatening .
  • Mirafra Technologies
    Physical Design Engineer Ii
    Mirafra Technologies Jan 2016 - Jul 2016
    Bangalore, Karnataka, In
    Analyzed Power and IR Drop for modem chips(10 nm) for Qualcomm. Also did the power pad placement and power grid distribution and analysis for the same chip.
  • Stmicroelectronics
    Design Engineer
    Stmicroelectronics Jul 2014 - 2016
    Geneva, Switzerland, Ch
    Worked on the RTL-GDSII flow. Performed RTL to synthesized netlist generation for a block in design, Place and Route (PnR) using Cadence Soc Encounter of block level design, IR Drop analysis and Power analysis of full chip and Design Rule Checks (DRCs) for power routing using APACHE Redhawk for full chip. Worked on block level synthesis of SoC designed for power trail of automotives which included PowerPC architecture, CAN subsystem, JTAG, SPI interfaces, BISTs etc.
  • Stmicroelectronics
    Intern
    Stmicroelectronics Jan 2014 - Jun 2014
    Geneva, Switzerland, Ch
    IR Drop is one of the major constraints that an ASIC designer has to keep in mind while designing a chip. IR Drop violation leads to improper functioning of the chip. Working under the backend team designing SoCs for automotives I had carried out IR Drop Analysis for controllers designed using 40nm and 55nm technology using APACHE Redhawk Tool. I had also generated Chip Power Model (CPM) for a controller designed using 40nm technology. During the training I got acquainted with RTL-GDSII design flow, the basics of a chip, various test corners used to carry out the analysis and terminology used in backend designing.
  • Komoline Aerospace Ltd.
    Intern
    Komoline Aerospace Ltd. May 2012 - Jul 2012
    • Controller for electronic perfume dispenserWorking under the product development team of the above mentioned company, a test circuit was designed and implemented that can control a dc fan or motor according to the values supplied to it (such as on time, off time, total duration etc.) by the client. These values were supplied to the controller(ATtiny 4313) through UART from a software, developed in Visual Basic, installed in a PC and stored in EEPROM of the controller . This circuit was successfully installed at the client’s office. • RFID Tag reader and FTP file uploader through GPRSA code was developed for ATmega128 controller that can read a RFID Tag through RFID Tag reader. The data between reader and controller was transferred through UART. The data obtained was uploaded to a FTP server, provided by the company, via GPRS using SIM900 module.

Karan Modi Skills

Microcontrollers Electronics Automation Robotics Embedded C++ Programming C Embedded Systems C++ Python Eagle Pcb Firmware Real Time Operating Systems Embedded Software Embedded Linux Cuda C Embedded C Linux Java Computer Hardware Operating Systems Assembly Language Tcl Atmel Avr Arm Architecture Opencv Ardupilot Dronekit Api Application Specific Integrated Circuits System On A Chip Research Physical Design Very Large Scale Integration Semiconductors Machine Learning Microprocessors Debugging Pcb Design Hardware Architecture Computer Aided Design Apache Spark Hadoop Distributed Systems Algorithms Amazon Web Services Stm32 Cmsis

Karan Modi Education Details

  • University Of Pennsylvania
    University Of Pennsylvania
    Computer And Information Science (Embedded Systems)
  • It,Nirma University
    It,Nirma University
    Electronics And Communications Engineering

Frequently Asked Questions about Karan Modi

What company does Karan Modi work for?

Karan Modi works for Oracle

What is Karan Modi's role at the current company?

Karan Modi's current role is Principal Member of Technical Staff at Oracle Cloud Infrastructure..

What is Karan Modi's email address?

Karan Modi's email address is karan.modi@st.com

What schools did Karan Modi attend?

Karan Modi attended University Of Pennsylvania, It,nirma University.

What are some of Karan Modi's interests?

Karan Modi has interest in Science And Technology.

What skills is Karan Modi known for?

Karan Modi has skills like Microcontrollers, Electronics, Automation, Robotics, Embedded C++, Programming, C, Embedded Systems, C++, Python, Eagle Pcb, Firmware.

Free Chrome Extension

Find emails, phones & company data instantly

Find verified emails from LinkedIn profiles
Get direct phone numbers & mobile contacts
Access company data & employee information
Works directly on LinkedIn - no copy/paste needed
Get Chrome Extension - Free

Aero Online

Your AI prospecting assistant

Download 750 million emails and 100 million phone numbers

Access emails and phone numbers of over 750 million business users. Instantly download verified profiles using 20+ filters, including location, job title, company, function, and industry.