Kari A. Clark Email & Phone Number

London, Gb

London, United Kingdom

• I perform hands-on engineering in the laboratory using a combination of FPGAs and electronic/opticalcomponents and equipment.• I research approaches to increase the accuracy of time synchronised radio access networks to 10s picosecond order or better (about 10 trillionths of a second).• To assist me in my research, I am recruiting for a PhD student and co-manage a post-doc with projects in this research area.• I also teach junior engineers (undergraduates and masters students) about how to navigate complex FPGA topics such as clock domain crossings.

London, England, United Kingdom

• Very similar to my current role but without supervision and lecturing responsibilities.• I built an FPGA-based system to read phase values out from AMD Ultrascale GTY transceivers at 400 MHz in real-time, which I then averaged in hardware and output to external DDR4 DRAM via an AXI4 Master.

London, United Kingdom

• This role also primarily involved research into clock synchronised optical communications systems, as part of the EPSRC TRANSNET programme grant.• A key highlight: I customised FPGA hardware and Petalinux firmware to run Analog’s Quad MxFE Quad-DAC/ADC evaluation board.• A further key highlight: I built a custom packet generator and receiver in FPGA hardware to send andreceive packets from AMD Ultrascale GTY SERDES transceivers.

Cambridge, United Kingdom

• Co-invented clock phase caching, a clock synchronisation technique to reduce clock and data recovery time in optical switches, which I later implemented in full, and published, during the remainder of my PhD.• Key to the above invention is that I demonstrated that this approach works in FPGA hardware: I built low-level digital AMD Ultrascale GTY transceiver hardware to enable phase measurement and phase shifting functionality.• Additional elements of my internship project involved the design of a hardware to computer interface using a Microblaze softcore processor and the creation of a hardware debug interface for high-speed AMD Ultrascale GTY 25 Gb/s transceivers.

Gravesend

• I worked with a variety of children from age 4 to 11, including some with learning disabilities.• I engaged children in activities that challenge them beyond what they would normally face in a primary school environment; for instance helping groups deconstruct a desktop computer.• This role was a great opportunity for outreach - I hope I inspired a few children to consider working in engineering!

Kettering

• JF Machines (now Dantex Digital), produces high-volume industrial inkjet printers.• I added the ability to print variable data from these printers during my internship, which involved predominantly Python coding and experimental testing on the machines.• This internship, along with the previous internship at Aeristech Ltd, gave me the exposure to practical electronic engineering that facilitated my pivoting from Physics (my Undergraduate degree) to Electronic Engineering (my PhD).

Kenilworth, Uk

• Designed an IBGT gate driver PCB to industry best practises in order to minimise noise susceptibility. • Learnt to use Altium Designer, a widely used professional PCB design suite. • Wrote a series of design standards to improve the quality of in house PCBs.

Doctor Of Philosophy In Optical Communications (Phd), Electronic And Electrical Engineering

Activities and Societies: UCL Sci-Fi and Fantasy Society (Webmaster, 2015 to 2016; Webmaster, 2017 to 2019)• I built real-time.

Bsc Mphys, Physics, 1St Class (Equivalent To 4.0 Gpa)

Activities and Societies: Warwick Punk Society (Secretary, 2011 to 2013; Radio Show Host, 2010 to 2013)• I studied Physics as my.

High School, A-Levels In Physics, Mathematics, Biology, Chemistry, And An As-Level Extended Project, Grade A In All Subjects (Taken Before A* Was Possible To Achieve)