Technology and product R&D leader.I lead software and hardware systems design from early conception, algorithms/feature definition, infrastructure development, through to design tape out, and finally, productization. Previously, I worked at Samsung (may 2012 - July 2015). In this role, I led and managed an international team (USA and Korea) to design and deliver GPU texture unit RTL from scratch. I also worked on new innovative features in the graphics hardware pipeline including compression/decompression and vertex fetch pipeline. In my past work at AMD (ATI graphics), I was involved in GPU products including HD 5xxx GPUs and AMD A series APU/CPUs (architectural aspects for power dissipation, software aspects), HD6xxx GPUs (commercially known as AMD Powertune), and architectural features for APUs and GPUs productized until 2015. Specialties: Graphics rendering and Image processing algorithms, Machine Learning, Image recognition/ML applications, GPU/Compute architecture, Energy efficiency.
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AppleCalifornia, United States -
ArchitectApple Aug 2015 - PresentCupertino, California, UsApple Silicon architecture for Graphics, ML and Visual Computing. -
Architect/Senior Manager, Graphics And SystemsSamsung May 2012 - Jul 2015Early founding member (2nd employee) of team chartered to design "GPU from ground up". Responsibilities include feature list research and survey, architecture design and specification delivery, simulation infrastructure, and managing international teams to deliver RTL. Typical day to day responsibilities include architecting graphics pipeline innovations and hardware, coding functional and timing simulators (C, C++), leading and managing design teams, and documenting specifications.
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Architect, Office Of The Cto ArchitectureAdvanced Micro Devices May 2007 - May 2012Research in architecture design, modeling, and exploration for future GPUs/Fusion APUs
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Graduate Research FellowUniversity Of Utah Aug 2007 - Sep 2008Salt Lake City, Utah, UsCoGenE: A framework for architecture design, optimized compilation, and automation of domain specific accelerators. -
Colloborative Research - Ray Tracing HardwareUniversity Of Utah Mar 2007 - Sep 2008Salt Lake City, Utah, Us* Investigating software streaming techniques for graphics through ray tracing* Exploring StreamRay, a streaming architecture and hardware for ray tracing -
Graduate Research AssistantUniversity Of Utah Aug 2005 - Aug 2008Salt Lake City, Utah, Us● Fast Design Space Exploration of architectural choices for domain specific coprocessors.● Design and implementation of a power efficient compiler for sophisticated embedded applications based on the Trimaran Compiler framework.● Workload characterization for sophisticated embedded applications (speech recognition, face recognition and wireless telephony) -
Graduate Technical InternIntel Corporation Jan 2006 - May 2006Santa Clara, California, UsDevelopment, Analysis and Validation of an ASIM-based Next Generation X86 (Nehalem) architecture.● Developed various modules in the Instruction Fetch and Branch prediction pipeline.● Performance validation of the Front end (Fetch, decode and branch prediction) pipeline.● Performance profiling to accelerate simulation speed of the ASIM based simulator.
Karthik Ramani Education Details
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University Of UtahComputer Science -
University Of UtahElectrical Engineering -
University Of MadrasElectronics And Communication Engineering
Frequently Asked Questions about Karthik Ramani
What company does Karthik Ramani work for?
Karthik Ramani works for Apple
What is Karthik Ramani's role at the current company?
Karthik Ramani's current role is Computer Architect.
What schools did Karthik Ramani attend?
Karthik Ramani attended University Of Utah, University Of Utah, University Of Madras.
Who are Karthik Ramani's colleagues?
Karthik Ramani's colleagues are Erin Lee, Ria Andriani, Gabriela F., Surendra Baghel, Ashish Naiyer, Muhammed Risuwan, Sizakele Zulu.
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