Kathan Shah Email & Phone Number

Redmond, Washington, Us

Responsible for enhancing the end-user experience by understanding the user’s intent and supporting meaningful scenarios on Microsoft’s smart assistant and search capabilities.• Led feature development on Cortana LU scenarios and schema support in collaboration with the partner skills team.• Accomplished model architecture enhancement (SVM – CRF – BERT n-layer model) by leveraging contextual features thereby improving the query Precision/Recall metrics.• Opportunity analysis and exploratory research in prompt engineering for LLMs.• Research on analyzing improvement opportunities of Office search metrics with several query alteration techniques such as stemming, lemmatization on Compliant Workspace. • Successfully developed and deployed Entity Tagger models for search ranker results relevance improvement based on personalized lexicons with evaluation on real search style queries based on characteristics of eyes-off unlabeled data using unsupervised evaluation techniques.

Santa Clara, California, Us

Deep Learning Engineer - Intel Corporation, Santa Clara, CA (Aug 2018 – Oct 2019)Responsible for contributing to Intel’s Device Group to innovate and bring value holistically and user trust on devices powered by IA platform.• A key role in the research and development of deep learning hero cases (segmented style transfer, image captioning, etc.) helping Device Group demonstrate the computing capabilities of IA devices. • Instrumental in designing and developing first-gen Computing Experience Metrics Evaluation and Optimization toolkit targeting Battery Life and over 30 Responsiveness metrics for IA platforms. • Proactively engaged stakeholders and partner teams to bridge knowledge gaps thus successfully bringing Intel certification for the first time across 6+ laptop brands.Software Developer - Intel Corporation, Santa Clara, CA (Feb 2015 – Aug 2018)Responsible for executing and validating the usability and reliability of software products on IA processors and accelerators.• Drove research and development on IoT solutions by conducting user studies in collaboration with a sociology scientist to deploy an ecosystem that leverages IntelFPGA capabilities on the software platform to analyze and improve performance and end-user experience. • Introduced innovative verification methodologies: ‘self-improving’ Test Env based on machine learning practices.• Conducted planning, SUMs, retrospectives, and product development sessions as an Agile Scrum Master for the Cache Backend team helping the team struggle less with escaped defects and estimates thus improving overall velocity.

Los Angeles, Ca, Us

I assisted Dr. Tabar for monitoring and evaluating course homeworks and exams. I was also responsible for proctoring the exams.

Bengaluru, Karnataka, In

My role was to design and test IEEE 754 Single Precision FPU attached to LEON3 processor on AMBA bus. This design was implemented on ACTEL ProASIC3E.(Dept: On-board Signal Processing Department)

Master Of Science (Ms), Electrical And Computer Engineering

Bachelor Of Engineering (B.E.), Electronics And Communication

Education record