Katikila Pradeep Email and Phone Number

► About Me: I am meticulous, diligent and skilled professional offering 2+ years of exceptional contribution towards working on various projects for fixing various issues related to Design-for-testability (DFT) and Physical Design using industry by utilizing standard EDA tools, Mentor Graphics Tessent, and Mentor Graphics Calibre integrated with Cadence Virtuoso. I have proven excellence in fixing issues at 16nm/22nm Technology node designed on Virtuoso & verifying the same with Calibre tool, and fixing DRC, LVS and PERC errors, extracting the parasitic elements, and running Back Annotation, implementing the circuits in 130nm to 45nm technology in Mentor Graphics EDA as well. ► Career Commencement: I started my career with Application Engineer position, moved to the current role as a Senior Application Engineer. In my previous stints, I worked for a while as an intern at Sion Semiconductors private limited, India in 2016. I have handled projects concerned with the design and implementation of hardware efficient multiplier using reversible logic gate, and Mobile Controlled Robot. ►Highlights:☛ Post Graduate Diploma in ASIC Design and Verification at NIELIT, India☛ Certified Physical Design Verification Expert using Calibre Tool (DRC, LVS, PERC)☛ Certified in ASIC Design and verification at NIELIT►TECHNICAL FORTE:Digital circuits, integrated systems, methods, programming languages and technologies: PnR, STA, PDV, SI and PV with Calibre (DRC/LVS/PEX), RTL to GDSII Flow - Floor Planning, PNR EM Checks, IR Drop, CTS, Power Planning, Design-for-testability (DFT), ASIC and FPGA Design, Verilog HDL, C Programming, TCL and PERL Script Custom Design: Virtuoso—Layout editor/Schematic editor (Cadence)Other Tools: Xilinx Vivado, Quartus, Modelsim, Cadence Virtuoso, Mentor Graphics pyxis. Leonardo Spectrum, Tessent shell.FPGA’s: Xilinx Spartan 6, Artix 7, Zynq 7000, Altera DS1, DE2, DE115Design Concepts: Digital circuit Design, Low Power VLSI, FPGA design► Specialties: Design-for-testability (DFT) | Logic Synthesis | Static Timing Analysis | Virtuoso—Layout editor/Schematic editor | Time Management | Electronic systems | Verilog | User Documentation | Scripting Languages | Communication Skills | digital signal processing skills | Technical Leadership | Navigation Systems | Embedded Systems | Scripting Languages |