Kelly Larson

Kelly Larson Email and Phone Number

Senior Staff Hardware Verification Engineer at Tesla @ Tesla
Kelly Larson's Location
Austin, Texas, United States, United States
Kelly Larson's Contact Details
About Kelly Larson

Functional verification expert with over 20 years of verification experience. Solid leadership and project management skills. Background in assertions and formal verification techniques. Experience with high level testbench languages and class libraries. Experience verifying microprocessors, DSP's, ASIC's and SoC's. Focus on constrained random testing and coverage models. Excellent communication skills, winner of various technical paper awards including two conference "Best Paper" awards at DVCon. Runs the Austin chapter of DVClub. Also a member of the DVCon, DAC Designer/IP and SNUG Technical Program Committees, and a past member of the Accellera Verification IP Technical Subcommittee (UVM Standard Committee).Specialties: Constrained-Random Verification,Assertion-Based Verification,PSL,SVA,SystemVerilog,High-level Testbench Languages,Formal Verification,Power Domain Aware Verification,SystemVerilog Class Libraries (UVM, VMM, OVM)AMBA Bus Protocols (APB, AHB, AXI, ACE)

Kelly Larson's Current Company Details
Tesla

Tesla

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Senior Staff Hardware Verification Engineer at Tesla
Kelly Larson Work Experience Details
  • Tesla
    Senior Staff Verification Engineer
    Tesla Jan 2018 - Present
    Austin, Texas, Us
    Working on next-generation Autopilot and AI hardware.
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  • Dvclub
    Club Officer, Austin Dvclub Host
    Dvclub Jul 2014 - Present
    Primary responsibility for coordination, planning and hosting of the Austin chapter of DVClub, a non-profit organization of over 800 members which meets quarterly. Serve as club officer, and also involved in planning and coordination events in the other host cities within the U.S. and Canada. Maintain the DVClub web site.
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  • Paradigm Works, Inc.
    Chief Verification Technologist
    Paradigm Works, Inc. Jul 2014 - Jan 2018
    North Andover, Ma, Us
    Verification of key components of the AMD Infinity Fabric using UVM testbench. Team lead for verification of an AXI subsystem within a large SoC with built-in redundancy targeted toward critical avionic applications (DO-254). Implementation of UVM testbench which incorporated a random test generation engine with built-in checking, subsystems included DDR, NAND, Scratch RAM, Boot ROM, PCIE, Ethernet, DMA, multiple AXI fabrics, security, synchronization and other blocks. Verification of a specialized memory controller for space applications using UVM methodology. Verification of a NAND flash SSD drive chipset, also using UVM methodology.
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  • Nvidia
    Senior Staff Verification Engineer
    Nvidia Sep 2011 - Jul 2014
    Santa Clara, Ca, Us
    Development of testbench architrecture and verification methodologies for the Tegra product line. Development of UVM base classes and testbench components including bus drivers and monitors, configurable scoreboards, transactions loggers, runtime assertion control, bus fabric and bridge models. Training and mentoring responsibilities.
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  • Mediatek
    Senior Technical Manager/Verification
    Mediatek Aug 2010 - Aug 2011
    Hsin-Chu, Tw
    Ex-pat assignment to establish DV capability within the product lines at our corporate headquarters in Hsinchu, Taiwan. Responsibilities included developing methodologies, training, staffing, and owning the verification roadmap. Teams responsible for very large digital baseband SoCs for wireless handsets.
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  • Mediatek
    Verification Manager
    Mediatek Jan 2008 - Oct 2010
    Hsin-Chu, Tw
    Manage all functional verification teams in Austin. Technical work included verification of DSP processor cores and large wireless communication chips. Responsible for developing verification strategies and roadmap for new methodologies.
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  • Analog Devices
    Dsp Verification Manager
    Analog Devices Jan 2000 - Jan 2008
    Wilmington, Ma, Us
    Manage all functional verification teams for DSP group in Austin. Verification of wireless and general purpose DSP processor cores and systems. Responsible for developing verification strategies and roadmap for new methodologies.
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  • Hewlett-Packard
    Verification Engineer
    Hewlett-Packard Jan 1989 - Jan 2000
    Palo Alto, Ca, Us
    Design and verification of PA-Risc processors, and related chipsets.
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Kelly Larson Skills

Systemverilog Functional Verification Asic Soc Microprocessors Processors Uvm Debugging Formal Verification Open Verification Methodology Verilog Digital Signal Processors Vmm Semiconductors Perl Rtl Design Eda Verification C++ Vlsi Logic Design Computer Architecture Simulations Fpga Amba Ahb Assertion Based Verification Hardware Architecture Integrated Circuit Design Axi Methodology Modelsim Arm Hardware Application Specific Integrated Circuits Test Processes Ncsim System On A Chip Specman Behavioral Modeling Usb Analysis Universal Verification Methodology Simulation Verification Methodologies Hardware Verification Ovm Coverage Models Testbench Architecture

Kelly Larson Education Details

  • University Of Colorado Boulder
    University Of Colorado Boulder
    Electrical Engineering
  • Brigham Young University
    Brigham Young University
    Electrical Engineering

Frequently Asked Questions about Kelly Larson

What company does Kelly Larson work for?

Kelly Larson works for Tesla

What is Kelly Larson's role at the current company?

Kelly Larson's current role is Senior Staff Hardware Verification Engineer at Tesla.

What is Kelly Larson's email address?

Kelly Larson's email address is la****@****log.com

What is Kelly Larson's direct phone number?

Kelly Larson's direct phone number is +151277*****

What schools did Kelly Larson attend?

Kelly Larson attended University Of Colorado Boulder, Brigham Young University.

What are some of Kelly Larson's interests?

Kelly Larson has interest in Photography, Golf, Skiing, Languages.

What skills is Kelly Larson known for?

Kelly Larson has skills like Systemverilog, Functional Verification, Asic, Soc, Microprocessors, Processors, Uvm, Debugging, Formal Verification, Open Verification Methodology, Verilog, Digital Signal Processors.

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