Experienced Engineer with a demonstrated history of working in the semiconductor industry. Skilled in Functional Verification, Perl Programming, Computer-Aided Design, and Debugging.
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Verification EngineerXtremeeda Usa Nov 2020 - PresentAustin, Texas, Us -
Consultant Uvm Rtl Verification EngineerTriple Crown Consulting On Assignment At L3Harris Technologies Feb 2019 - Aug 2020UVM Testbench with Scoreboard/Predictor development from scratch for FPGA , Agent development from scratch with reactive sequence, tests and sequences to meet functional verification goals for new features.
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EngineerIntel Corporation Dec 2014 - Aug 2017Santa Clara, California, UsRTL Presilicon Functional and DFT VerificationUVM/SystemVerilog Test Development -
Verification EngineerIntel Corp 2006 - Apr 2014Santa Clara, California, UsReset and DFx pre-silicon verificationPerl ProgrammingUVM test debugISCAN test development -
Vlsi Design Verification EngineerLsi Logic 2005 - 2006San Jose, Ca, Us -
Cad EngineerSymbios Logic 1994 - 1997
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Applications EngineerAt&T Gis 1990 - 1994
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Cad EngineerNcr 1980 - 1991Atlanta, Georgia, Us -
Cad EngineerNcr Microelectronics 1980 - 1987
Ken Kappeler Education Details
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University Of CincinnatiComputer Engineering -
University Of DaytonElectrical Engineering
Frequently Asked Questions about Ken Kappeler
What company does Ken Kappeler work for?
Ken Kappeler works for Xtremeeda Usa
What is Ken Kappeler's role at the current company?
Ken Kappeler's current role is RTL Verification Engineer, Retired.
What schools did Ken Kappeler attend?
Ken Kappeler attended University Of Cincinnati, University Of Dayton.
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