Ken Fraser Email & Phone Number

Wichita, Ks, Us

Wichita, Kansas Area

As PQE my accountability includes Quality Management of discrete passive & active electronic components, the PCB, PCBA, Integrated Chassis machines, NetApp's PCBA & CTO Contract Manufacture sites, Field MRR & Factory FPY metrics, metals, labeling, packaging, agency and regulatory compliance labels, BOM configurations, First Article Inspection Report review, Lifecycle change management, Worldwide Purge & Stop Ship management and Engineering Core Team leader of Field quality escalations & quality improvements.Working in concert with Wichita State University, I'm Failure Analysis champion of 32GB RDIMM Factory Function Verification Test top error message DIMM Map Out as reported out during the BIOS POST cycle.> Three major root cause factors discovered, 1. CPU Assembly process, 2. CPU Ops handling issue and 3. RDIMM Socket supplier poor gold quality coating in circuit within our CORE 3.0GHz CPU & RDIMM control lines, address & data busses.>> CPU Assembly Process: Torque trails ran, torque setting revised. Reseat Fail rate was 5% (5 ea,100 tested), is zero.>> CPU Handling Process: Worked with EMS CM and Intel to get proper Pick & Place handling cover removal tooling. Bent pin Fail rate was 2.4%, is 0.28%>> RDIMM Socket supplier disqualified for poor quality gold coating and for not working with NetApp to understand the root cause of their parts negative impact on the quality of our product. Fail rate in Factory was 2%, is zero. Poor quality gold coating empirically proven by Wichita State University Laboratory analysis reports: Cross Section Gold Coating Thickness, SEM-EDX, XPS reports.Results: > Filer Controller Field Quality performance improved. Field RMA DPMO was 5,500 (0.550%), with RDIMM Socket supplier change the DPMO is reduced to 1,100 (0.110%). > RDIMM Socket root cause failure analysis project is applied to my other NetApp products and has already resulted in sustained 5 million YoY (2.5 years and counting ) Field Failure cost avoidance.

Jasper In.

Lead Customer Engineer, Manufacturing Engineer, October 2014 - February 2018> Responsible for relationships between various customers & Kimball, New Product Introduction, Sustained Production, End Of Life & Reverse Logistics contract manufacturing business cycles of Printed Circuit Board Assemblies and Chassis System configurations.> Responsible for Leading, Coaching, & Training a customer focused Engineer Team.> Responsible for translation of customer BOM and documentation packages into Kimball standard configuration management formats and process tooling such that products are effectively & efficiently perfectly manufactured.> Responsible for implementing optimal cost-effective manufacturing processes and methods in accordance with product specifications and quality standards.Supplier Quality Failure analysis engineering projects. > Texas Instruments SOIC - impact high failing rate at ICT for OHM's out tolerance. TI rejects claim. I follow up with internal Failure Analysis & proved with Hunton Curve Tracer the TI NPN diode junction in the silicon wafer is out of spec (parasitic capacitance). TI accept Kimbal's claim, improved their test and our contained bad stock was swapped with TI revised screen tested materials. ICT FPY now exceeding FPY low limit boundary. After leaving Kimble I was soon contacted by Kimble Program Manager congratulating me on my project's success had earned Kimble the 2018 Supplier of Year. NPI Project: Self-Driving Steering Control Assembly.

New Port Richey, Fl 34655

Responsible for implementing optimal cost-effective manufacturing processes and methods in accordance with product specifications and quality standards.Optimization of Satisloh SPM-30 Generation, SPS-30 Polish, and CM-2SL Center Edge Bevel optic Computer Numeric Control processes. Quality & Process Improvements.> Cycle Time Reductions accomplished in several CNC Processes. > Radius Of Curvature CNC program corrections; was hours, shifts, days, is 0 to 120 min. > Pre-Polish Burn-In process; was 10 minutes per part, is 0 min., process cycle obsoleted.> Part Number Tooling Changeover; was 1-2 hours, is <25 min.> Improved products purchased from CNC tool supplier, developed with supplier collaboration VLOC’s Satisloh CNC tool drawing specifications & tolerances, revised Incoming QA Inspection Methods for CNC tools, and submitted development improvement recommendations to Satisloh for their proprietary CNC tool drawing software package, “Synline”. Developed and implemented SPC Work Instruction & SPC Charts for Zygo NewView5000 System, to ensure accurate & consistent micro inch Ra, RMS, & PV Optic Polished surface finish roughness measurements of VLOC product.

New Port Richey, Fl. 34655

Responsible for relationship between customers & VLOC, manage Quality Assurance personnel, the Quality Management System, and providing technical support to cross functional departments within the Neodymium Yttrium Alumina Garnet crystal (Nd:YAG) Laser Rod Business Unit.Warranty Return Material Authorization percent of revenue return rate and work in process defect reduction. > Continuous Improvement Facilitator & Manager of Failure Analysis, Containment, Corrective Action, Preventive Action and Reoccurrence Prevention for all Nd:YAG customer RMA warranty returns and internal process/product yield improvement projects. Accountable for all Customer 8D reports.> Championed of RMA return rate reduction project. KPI measured RMA rate as % of revenue. Five-year downward trend achieved: >1.8% 2008-2010, 1.51% in 2011, 0.56% in 2012, and <0.5% in 2013. My RMA reduction continuous improvement projects eliminated the systemic top Nd:YAG Laser Rod Warranty Returns. > Product quality characterization, process analysis, and improved production process control of the Nd:YAG Laser Rod crystal Barrel Roughness, Neodymium Dopant percentage distribution and Transmitted Wavefront quality characteristics.> Product quality characterization, process analysis, and improved production process control of the Nd:YAG Laser Rod chemical solution Stain Removal from Customer Supplied Material.> Metrology - inventor of a 40x magnification Visual Cross Polarizer Extinction Ratio Failure Analysis test bench for analysis of crystal lattice Structure Imperfections and Stress Intensity and Distribution within crystalline materials.Results: Improved customer satisfaction & VLOC's annual $1 million forecasted RMA field liability cash reserved for Warranty claims is reduced to $100,000. Freeing up $900,000 for VLOC to allocate to other business needs.

St. Petersburg, Fl 33702

Responsible for relationship between various customers & Jabil, New Product Introduction, Sustained Production & End of Life contract manufacturing business cycles for Printed Circuit Board Assemblies and Chassis System configurations.1999~2001 Cisco Direct Fulfillment; High Volume Router Sustained PCBA production. 2001~2002 Digital Lightwave Inc.; Sustained product production transfer from OEM DLI to Jabil facility and NPI of the NICPLUS Fiber Optic test chassis platform. 2002~2003 Symbol; NPI at St. Petersburg Florida, and then transfer of NPI into Pilot and Sustained production builds during my six-month on-site assignment at Jabil Guadalajara Mexico. 2003~2006 Cisco; NPI and Sustained production of Cisco initial market penetrating MDS 9000 Storage Area Network Chassis platform. 2006~2008 Jabil Defense and Aerospace; Lead Free NPI through Sustained production of multiple Military customer platforms.QMS> Facilitated Defect Per Million Opportunity Improvements.> Collaborated with Failure Analysis Department on Root Cause Analysis of electrically defective components.> Collaborated with Suppliers on resolving issues with non-conforming product.> Performed Process Failure Modes Effects Analysis on SMT and Chassis Assembly systems.> Managed Solder Paste deposition through Statistical Process Control charts.> Performed PCB & Mechanical DFM analysis reviews.> Team member Design of Experiments on “Nexlev” Ball Grid Array Surface Mount Connectors.> Cisco MDS 9000 Achieved 8% End To End yield improvement through 7 test steps within 1 year.Custome tooling designer -> Preventative Action and Continual Improvement Initiatives:> Designer Functional Verification Test cable insert & removal bent pin damage reduction fixture.> Designer Large-Scale assembly/disassembly damage reduction fixture for Cisco's SAN PCBA family.> Designer opposing corner preassembly fixture tooling that eliminated PCBA "Bow & Twist" during metals assembly process.

Auburn Hills Mi & St. Petersburg Fl

Responsible for 68 Direct Labor Auburn Hills MI. and later 42 Direct Labor in St. Petersburg FL. and for the operations performance, efficiency, yields for high volume low mix & high mix low volume Automotive & Networking Printed Circuit Board Assembly production line environments. Developed and empowered Managers In Training and Direct Labor employees in all operations of PCBA.Coordinated efforts of the support groups in resolution of issues affecting PCBA production processes.> Automotive Workcell, team achieved a Customer DPMO reduction from >6,000 to <100 in six months.> Ensured ship commitments achieved to sustain the automotive industry Just In Time delivery schedule.> Team Leader of Process & Product Failure Modes Effects Analysis & Control Plans for Automotive PCBA.> Networking Workcell, increased PCBA production line Efficiency from 40% to 90% in six months. > Managed one of fifteen PCBA production lines that consistently contributed to >20% of campus revenue. > Facilitated Defect Per Million Opportunity Improvements for Out of Box Audit & Internal Processes

Auburn Hills Mi

Responsible for all aspects of the Electrical Test processes on nine high volume Printed Circuit Board Assembly production lines and the assembly & maintenance of production Functional Verification Test fixtures and Environmental Stress Screen systems.> Analyzed In Circuit Test, Functional Verification Test, and Environmental Stress Screening electrical test failures effectively and efficiently as product or non-product related.> Escalated to Manufacturing Management and worked real time to closure product related failures.> Resolved software and hardware related Test Fixture non-product related failures.> Performed component level debug Failure Analysis on and repaired in line process ICT, FVT, and batch process ESS Electrical Test equipment. > Performed Preventative Maintenance on 60+ ICT fixtures.> Performed component level debug Failure Analysis on electrically defective PCBA.> Authorized by responsible Test Engineers to debug their NPI and Sustained ICT production programs.Major KPI Achievement: Merit review Test Engineering Equipment Downtime Goal for TE is 4%. I was successful at keeping my annual test equipment down time to <2%. A first in Jabil Auburn Hills history.

Ann Arbor, Mi.

Greeted walk in customer at service counter. Provided written quotes for Troubleshooting & Repair of various Apple computers.Responsible for Spares Inventory control, weekly stock cycle counts, placed material purchase orders with Apple and perfromed receiving inspection.

Ida, Mi.

Started a VCR Repair business while seeking a career related job.Initial flyer advertising, great quality work and fast turnaround kept me occupied repairing VCR machines.

Saline, Mi.

Responsible for 19 cross functional Direct Labor. Lead and trained personnel in Electrical Test, Failure Analysis, Mechanical & Cable Assembly, PCBA Production, Configuration Control, and Quality Control departments. Managed cross functional department personnel on second shift in manufacturing and verification of PCBA and Chassis systems.Performed ICT, FVT, and provided component level debug Failure Analysis support to Electronic Technicians on PCBA and Chassis systems.

Saline, Mi.

Responsible for final Functional Verification Testing and component level diagnostic Failure Analysis of both PCBA and Chassis systems.ICT & FVT and component level debug Failure Analysis performed on Intel 8088, 80286 & 80386CPU IBM clone industrial 19” rack mount computer systems & on Dow Chemical process control systems consisting of up to 1,200 PCBA per configuration.

Tolado, Oh.

Certificate In Computer Technology, Electronics

Certificate in Computer Technology, May 1985 GPA: 3.5 & Curriculum: 853 course hours covering basic electronics, AC/DC circuits, circuit.

Certificate In Vcr Maintenance And Repair, Vcr Maintenance And Repair