Ken Pacheco Email and Phone Number
Ken Pacheco work email
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Ken Pacheco personal email
Many years of diverse experience in the electronic industry. Excellent problem solving and troubleshooting skills. Flexible work experience including: unit test, stress testing, regression testing, perform Failure Analysis (FA) on Printed Circuit Board Assemblies (PCBA) and Application Specific Integrated Circuit (ASIC) related issues. Work on validating and characterizing interfaces of an ASIC including host (SAS, SATA, PCIE) and memory interfaces. Perform signal integrity work on memory interfaces flash, Single Data Rate (SDR)/Double Data Rate (DDR) memories and NAND. Able to perform minor code modifications required during testing. Assist in developing an automation processes used during characterization and PVT testing.
Micron Technology
View- Website:
- micron.com
- Employees:
- 32782
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Micron TechnologyLongmont, Co, Us
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Triage Lead At MicronMicron Technology Apr 2020 - PresentBoise, Idaho, Us
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Compatibility Validation EngineerMicron Technology May 2017 - Apr 2020Boise, Idaho, Us
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EngineerSeakr Engineering, Inc. Aug 2016 - May 2017Centennial, Colorado, UsEngineer III, Recurring Product Test -
System EngineerMicron Technology Mar 2012 - Jul 2016Boise, Idaho, Us• Perform Failure Analysis on Solid State drives. Drive issues to root cause. Run board verification testing. • Develop test plans for future products. Bring up and run new features of the ASIC using an FPGA based test fixture and emulator scripts. First to bring up the new ASIC parts and start the validation. Test and repair circuit boards and fix setup issues. • Characterized different interfaces and buses: PCIE, SAS, SATA, DRAM, NAND, JTAG and Clock jitter.
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Hardware EngineerSeakr Engineering Mar 2011 - Mar 2012Centennial, Colorado, Us• Run testing on a Solid State recorder from development through the pre-flight and flight test processes with the final step being shipment of the unit. Testing includes: Verification, Vibration, EMI, Thermal cycle and Thermal Vac.• Develop testing to assure all blocks of the PCBAs are tested and assure all customer requirements are met. Test and repair circuit boards. Keep procedures updated
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EngineerConduant Corporation Jun 2009 - Mar 2011Longmont, Co, UsReduce in-house inventory by performing failure analysis on production failures. Work with boards shops addressing problems to improve production yields. Test new designs and help develop tests. Interfaces being used are Fiber channel, PATA/SATA, PCI, and PCI Express -
Senior EngineerSeagate Technology Jan 2006 - Jan 2009Fremont, Ca, Us• Characterized different interfaces of the ASIC. Assured all specifications and company quality goals were met. Interfaces include communication with the host (ATA), communication with memory Flash and SDRAM. Areas of measurement were signal integrity, setup, hold, rise and fall times. These measured across Temperature-Process-Voltage. • Developed automation scripts using Labview used to automate the characterization process, allowing company to speed up testing process.• Performed FA on ASIC and memory related issues. Collaborated with chip vendors and assisted in identifying part related issues.• Made small modifications to code, allowing testing of settings and verifying new features of ASIC prior to being used on products. • Maintained ASIC Lab and assured all equipment was calibrated and functioning per company requirements. -
Senior EngineerMaxtor Jan 2000 - Jan 2006UsASIC verification group. • Defined and characterized settings needed to keep different interfaces of the ASIC within specification. These measured across Temperature-Process-Voltage. • Debugged and tested new circuits, test fixtures and helped with (FA) activities. With failures identified, corrective actions ranged from code changes, board rework, board layout changes, chip changes or test screens. • Evaluated parts from new vendors mainly SDRAMs and Flash parts. Supplied feedback to the component group responsible for purchasing the parts assuring parts met all specifications.• Maintained Lab and assured all equipment was calibrated and functioning per company requirements. -
Senior Engineering TechnicianMaxtor Jan 1996 - Jan 2000UsSenior Engineering Technician PCBA design group tested new boards and circuits, and performed FA. • Performed initial board rework identified during FA process and documented instructions for use in board shop.
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Engineering TechnicianStoragetek Sep 1979 - May 1996My first real job started as a unit test technician progressing systems through the test process prior to shipment. Worked into a lead position assigning work direction to the test team. Moved into an engineering group aiding in developing the test processes and performing failure analysis. Debug problems to component level and work with design engineers both software and hardware to improve the product. Helped start three new product lines while working for StorageTek.
Ken Pacheco Skills
Ken Pacheco Education Details
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Warren National UniversityComputer Science -
Regis UniversityEnglish Classes
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Denver Institute Of TechnologyElectronics Engineering Technician
Frequently Asked Questions about Ken Pacheco
What company does Ken Pacheco work for?
Ken Pacheco works for Micron Technology
What is Ken Pacheco's role at the current company?
Ken Pacheco's current role is Triage Lead at Micron Technology.
What is Ken Pacheco's email address?
Ken Pacheco's email address is ke****@****ast.net
What schools did Ken Pacheco attend?
Ken Pacheco attended Warren National University, Regis University, Denver Institute Of Technology.
What skills is Ken Pacheco known for?
Ken Pacheco has skills like Debugging, Failure Analysis, Testing, Fpga, Electronics, Usb, Storage, Pcb Design, Asic, Hardware Architecture, Embedded Systems, Firmware.
Who are Ken Pacheco's colleagues?
Ken Pacheco's colleagues are Anusha Yarramareddy, Gary Cope, Paritosh Vyas, Rashmi Mhatre, Joe Huang, Zack Stahl, Cssbb, 林怡姍.
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