I'm an electronic engineer with a software bias. Experience in analog design (specifically: power electronics), then EDA tools, specializing in parallel processing mixed-signal simulation. I'm used to working with others peoples' large C/C++/Verilog projects.Contributed to the development of the Verilog-AMS and SystemVerilog standards, and am now looking at how to merge EDA and parallel programming methodologies.I'm good at reducing problems to fundamentals, and finding alternative approaches that can be implemented with minimal disruption.Specialties: EDA Tool Development, parallel processing and mixed-signal simulation, verification methodology. Smart Grid strategy.Software architecture. C, C++, perl, Tcl, PHP, MySQL, PythonMisc keywords: wreal, real-number, clock-domain-crossing (CDC), behavioral modeling, IoT, SystemVerilog-AMS, RF, sensors, co-simulation, neural networks, AI.Initials at IEEE if you want to connect by email.