Kevin Cameron Email & Phone Number

Sunnyvale, Ca, Us

Sunnyvale, Ca, Us

Startup working on making solar PV and EVs work better together.

Sunnyvale, Ca, Us

Design methodology, simulation, modeling.Analog/Mixed-Signal simulators.Clock Domain Crossing detection methodology.High variability and SoC timing/power verification.AI techniques for building fast models from SPICE.

Austin, Texas, Us

Found most of team and set them off on the robotic EV charging track.

Boston, Ma, Us

Trying to wrangle efforts in JTAG debug, optical processor modeling and RISC-V extension into a coherent whole. Imperas tools don't talk to the hardware models in SystemVerilog simulators, so I was trying to fix that by incorporating Verilator into the Imperas modeling code.

Austin, Tx, Us

AMS verification methodology for PMIC, mostly semi-automated generation of behavioral SV/AMS models (and test-benches) from Cadence schematics for checkerboard approach.

Verification of IP coming in from vendor for a network off-load IC.

Contracts involving RISC-V programming and Palladium/Protium support.

San Jose, California, Us

Testing Tensilica cores in a large SoC - C/C++ with SystemVerilog on Palladium.

San Diego, Ca, Us

Modeling RF/Analog components for use in (digital) SystemVerilog SoC test-bench.

Ridgefield Park, Nj, Us

Working on C++ GPU model (added interactive debug with Python).Build and regression system acceleration (cmake,LSF,dEQP).

Santa Clara, Ca, Us

Mixed-signal simulator speed-up.Planning multi-abstraction simulation, for IoT and low-power SoC.

Sunnyvale, California, Us

Added supply connection support to Verilog-AMS connect modules in CustomSim(XA) - user space Tcl/VPI based methodology (releases from 2014/06).Prototype SystemVerilog-AMS (nettypes/DPI/XA).

San Bruno, California, Us

Assisting in the deveopment of SystemC/C++ simulation for operational modeling of medical facilities (worked with EC2/EBS/Starcluster/SGE).

Santa Clara, California, Us

VHDL behavioral modeling for RF/analog for mixed-signal SoC verification - wreal, spectral.Wrote OpenAccess based (C++) VHDL netlister for Virtuoso.

Milpitas, Ca, Us

PHP/Perl/MySQL for datamining, Python for system testing

Los Altos, California, Us

Analog IP tools and methodology. Integrated Berkeley Spice3 and Icarus Verilog (vvp-embedded branch) for mixed signal simulation, GDSII processing (distributed parallel). Valgrind/callgrind profiling.Sys-admin tasks (ubuntu/windows): VPN via ssh, TWiki,Apache(iCal/webdav,CGI scripts),IMAP,cygwin.

San Jose, Ca, Us

Various jobs supporting Sonics SoC interconnect IP generation and verification tools.C++ verification environment for OCP/AMBA/AXI protocols development/support, some SystemC. Verilog simulation (nc,vcs,modelsim).Porting verification tools from 32bit code to 64bit (quickthreads/pthreads).Backward compatible compiler setup (compile on new machines for old for customers on old hardware).

Hard macro model enhancement (Verilog/VHDL - ModelSim,NCsim,VCS).

Us

Developing tools to support in-house hardware simulation accelerator (project dropped due to departure of lead and finances). GNU Compiler (gcc) verification, fixing M68K assembly code.

CAD Tool development, then ASIC Verification (ATAPI/USB, ARM)Represented Nat Semi at the SystemVerilog committees.

Verilog-AMS simulator development. (Metasoftware was acquired by Avant! in '96)

Development of VCS-MT (parallel processing Verilog). Acquired by Viewlogic in '94.

Simulation Tools Development.

VHDL simulator development. Acquired by Compass in '93. Key in speeding up simulation to enable acquisition.

Software R&D: parallel processing VHDL, uCode compiler for T9000

Worked on various projects related to a custom Silicon layout tool.

Switch-mode power supply design - off-line 300 - 3000W

Mountain View, Ca, Us

Various design and EDA tool development tasks for gate arrays.

Electronic Engineer on Gyro-Compass project for oil drilling. High temperature precision analog measurement and power electronics.