• Lead RF hardware engineering teams through all phases of NPI development including setting high-level program goals and integrating crucial RF dependencies into the program schedule• Define wireless feature set for new products; technologies include Cellular, WiFi, Bluetooth, GPS, and NFC• Prepare and present executive level reports on program status, build readiness, and yield/FA status• Facilitate cross functional collaboration between RF and other subsystem teams• Drive RF subsystem component design/release/delivery process internally and with vendors• Manage and travel to NPI builds at contract manufacturers in China, supporting proto through MP builds

• Led internal team of electrical, mechanical, and firmware engineers and acted as client interface• Developed requirements, project schedules, and budget for complex consumer electronics projects• Coordinated risk analysis, generated mitigation plans, and communicated with client project engineers and management through multiple phases of development• Resource planned with company leadership to ensure Pensar’s design and revenue goals were achieved

• Led Wireless Design engineering teams through all phases of NPI development including setting program goals and executing to schedule• Defined wireless feature set for new products; technologies include Cellular, WiFi, Bluetooth, GPS, and NFC• Facilitated cross functional collaboration between Wireless Design and other Apple design teams• Prepared and presented executive level reports on program status, build readiness, and yield/FA status• Coordinated with suppliers and vendors for internal as well as factory design support• Managed and traveled to NPI builds at contract manufacturers in China, supporting proto through MP builds

Responsible for cellular front end module product definition in collaboration with OEM and internal development team. Products include highly integrated Tx and Rx modules including PAs, LNAs, switches, filters, and bias controllers.Maintain 3 year roadmap and publish market requirements documents (MRDs) for LNA and RF switch products based on projected market needs and competitive analysis.Generate and present marketing content to Peregrine/Murata's OEM customers.Interface with OEM customers and internal technical design teams to define specifications and optimize designs for BOM wins in high volume, high profile cellular phone buildsManage communication with Japan and USA based engineering teams to foster greater collaborative co-design of RFIC cellular modules for the world’s most advanced cellular architectures, discussing performance requirements and negotiating design trade-offsGenerate patents and new circuit topologies and capabilities to increase Peregrine and Murata’s IP footprint in the field of cellular analog and RFIC design

Interfaced with internal technical design teams to define specifications and optimize designs for BOM wins in high volume, high profile cellular phone buildsCollaborated with Murata Manufacturing engineering and business management to define 1-3 year roadmap after acquisition and development strategy, aligning with top tier OEMs and chipset vendorsOn-site engineering and design support of cellular front-end products including Antenna Switch Modules (ASM), Front-end Module with integrated Duplexers (FEMiD), Receive Diversity Switch Modules, Transmit IC module (TXM), and PA modules (PAM) for future phone modelsSupported failure analysis of new and existing productsGenerated patents and new circuit topologies and capabilities to increase Peregrine’s IP footprint in the field of cellular analog and RFIC designContinued to perform as Senior Hardware Design Engineer for company’s top products

Designed CMOS switches for cellular RF Front End modules using UltraCMOS (SOI) technologyDrove new product development through all stages of product lifecycle, optimizing efficiency at each stepDeveloped schedules with program managers and coordinated resources to achieve critical target datesSimulated circuits in Cadence and ADS environments to validate and optimize performanceResponsible for analog circuit design, floor planning and layout of entire ICs, targeting industry-leading harmonic, IMD and insertion loss performance in the smallest die area possibleLed design validation, lab characterization and test efforts to meet extremely fast cycle timesDeveloped chip-level experiments to understand and improve future designs

MS in Electrical Engineering at the University of Washington.

· Worked in pre-sales environment to address needs and develop test and measurement solutions · Led efforts with product R&D divisions to develop new test and measurement instruments · Coordinated with product divisions to deliver demonstrations and presentations to customers · Identified and drove new business opportunities for the Americas Field Sales Organization

· Worked with the Inline Characterization team to track and determine changes in 200mm wafer fab · Analyzed kerf signals with SPC software and helped to forecast yield roll-offs based on wafer characteristics · Collaborated on the design qualification for 90nm processing in 200mm wafer fab

· Researched and developed alternative power solutions for United States Air Force soldiers· Collaborated with end users to direct product development and set mission requirements · Reviewed Broad Agency Announcement (BAA) as well as Small Business Innovation Research (SBIR) proposals from vendors