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Kevin Glass Email & Phone Number

Principal Engineer and Director at Sierra Monolithics
Location: Scottsdale, Arizona, United States 9 work roles 3 schools
1 work email found @netzero.net LinkedIn matched
✓ Verified May 2026 4 data sources Profile completeness 86%

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Current company
Role
Principal Engineer and Director
Location
Scottsdale, Arizona, United States
Company size

Who is Kevin Glass? Overview

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Kevin Glass is listed as Principal Engineer and Director at Sierra Monolithics, a company with 15 employees, based in Scottsdale, Arizona, United States. AeroLeads shows a work email signal at netzero.net and a matched LinkedIn profile for Kevin Glass.

Kevin Glass previously worked as Principal Engineer / Director at Sierra Monolithics and Principal Engineer / Director at Sierra Monolithics. Kevin Glass holds Msee, Electical Engineering from Arizona State University.

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Email format at Sierra Monolithics

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{first_initial}{last}@netzero.net
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AeroLeads found 1 current-domain work email signal for Kevin Glass. Compare company email patterns before reaching out.

Profile bio

About Kevin Glass

PROFILE FOR KEVIN GLASSKevin Glass is technical leader with extensive experience in the successful design and development of some of the most advanced chips in the semiconductor industry. Consistent first time success, the result of innovation, leadership, organization, and attention to detail. Chip designs range from high volume products, to advanced R&D technology developments including: mm-wave 10-44GHz+ fiber optic, data conversion, and radio components; Cellular handset RF frontends and synthesizers, and high MIPs/watt programmable DSPs; along with the most advanced highest performance microprocessors. Aggressive projects on aggressive schedules with prodigious IP production.CORE COMPETENCIES FOR KEVIN GLASSWireless: Systems Architecture and Analysis; GSM, EDGE, WCDMA, UMTS, LTE, 3GPP, ETSI; Receiver and Transmitter Line Ups, Sensitivity, EVA, Zero IF; Fractional N Frequency Synthesizers; A/D, D/A, Delta Sigma; Band Pass Delta Sigma; LNAs, Mixers, Filters, Opamps, LDOs, References. Fiber Optics: System Analysis, OC-192, OC-768, 802.3ae, 802.3ba, 100G OIF, OTN; Coherent Receiver, 66Gsps A/D, Transmit Pre-distortion; 44GHz Laser and Modulator Drivers, CDR, Mux, De-Mux, TIA, and Limiting Amps, mm-Wave; Modules; Laser Biasing; CMOS Active Pixel Arrays.Microprocessors/DSP/VLSI: Micro-Architecture Development, x86, MIPs, iA64, ARM, DSPs, Computer Arithmetic, Cache, Floating Point, Memories, High-Speed Data path, Logic Design, Chip Planning, Performance Modeling and Validation, Timing Verification, Design Methodology, Chip Planning, Process Modeling.Management: Planning, Scheduling, Product Definition, Market Analysis, Multinational, Responsible for up to 30 engineers.CAD Tools: Cadence, Spectre RF, ADS, HFSS, Sonnet, Matlab, Excel, VerilogA, Msim, Verilog, C, C++, may other tools WEBSITES ABOUT KEVIN GLASS http://kevin-glass.com/ http://kevinglass.info/

Current workplace

Kevin Glass's current company

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Sierra Monolithics
Sierra Monolithics
Principal Engineer and Director
Scottsdale, AZ, US
Employees
15
AeroLeads page
9 roles · 34 years

Kevin Glass work experience

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Principal Engineer / Director

Current

US

Architecture and mm-wave circuit design of data converters, frequency synthesizers, advanced RF communication and fiber optic communication I.C.s.; utilizing IBM 65nm CMOS-10RFE, 45nm CMOS-12SOI, 32nm CMOS-32SOI, and 130nm BiCMOS/SiGe 8HP.100GB and 40GB fiber optics - Coherent Receiver. 1. Design of 66Gsps 6 b flash A/D converter in 8HP, using many new.

2008 - Present ~18 yrs 4 mos

Principal Engineer / Director

Current

US

2008 - Present ~18 yrs 4 mos

Principal Engineer / Senior Manager / Senior Staff Engineer

Santa Clara, California, US

Radio systems architecture for CMOS, BiCMOS/SiGe UMTS multimode cellular phone chipset. Developed link budget system spreadsheet; receiver line-up, including, gain, bandwidth, noise figure, and IIP3, for each circuit block, and A/D dynamic range, to meet WCDMA and EDGE 3GPP requirements. Reviewed transmitter architecture options to merge WCDMA with EDGE..

1995 - 2007 ~12 yrs

Principal Engineer, Senior Design Manager, Senior Member Of Technical Staff

Santa Clara, California, US

LXT43001 – Most advanced, highest performance 42G bit OC-768 Limiting Amplifier available when entered production. Designed in InP HBT technology the amplifier exhibits > 40dB gain, > 43GHz bandwidth, 5ps group delay, and < 5ps p-p jitter. The development of this amplifier solved the following key problems: Amplifier architecture that achieved maximum.

1995 - 2003 ~8 yrs

Principal Engineer, Senior Design Manager, Senior Member Of Technical Staff

Santa Clara, California, US

10Gbit Ethernet, 5Km and 40Km, MSA module design. Developed Optical Link Budgets for IEEE 802.3ae. Designed transponder electronics: TIA, limiting amp, SerDes / PLL bandwidth, laser driver and XAUI I/O. Module electrical design - power supply distribution/bypassing, signal interconnect/integrity, coupling/impedance matching, and performance tunable.

1995 - 2001 ~6 yrs

Principal Engineer, Senior Design Manager, Senior Member Of Technical Staff

Santa Clara, California, US

Micro-Architecture, advanced technology,and circuit development for the third generation iA64 microprocessor (YOSEMITE). Identified and solved major issues to implement a highly parallel multi-gigahertz microprocessor in 90nm CMOS technology. Cluster Manager for REN, RSE, ISD, BRU units on MERCED (1 million transistors) (30 engineers). Coordinated.

1995 - 2000 ~5 yrs

Principal Engineer, Senior Design Manager, Senior Member Of Technical Staff

Santa Clara, California, US

Spread Spectrum Radio Project – Developed digital radio system architecture, along with low power circuits for radio sub-systems as follows: low noise amplifier, PLL and DDS frequency synthesizer, high speed flash A/D (3 patents issued).PLL Division Expert – Designed spread spectrum PLL used in all HP ink jet printers; 1st silicon went to production..

1995 - 1996 ~1 yr

Principal Engineer

Rockwell Dcd

RSP; a low power, High MIPs/Watt super scalar DSP for wireless, cellular, and smart phone applications (6M transistors).Developed chip level techniques resulting in exceptionally low power. Architected low power instruction and data caches, performance optimized for DSP and graphics (patent filed). Cache circuits designed: 4M SRAM using current sensing.

1992 - 1995 ~3 yrs
3 education records

Kevin Glass education

Msee, Electical Engineering

Arizona State University

Course Work And Research Towards Phd In Electrical Engineering

Arizona State University

Bsee, Electical Engineering

University Of Wisconsin-Milwaukee
FAQ

Frequently asked questions about Kevin Glass

Quick answers generated from the profile data available on this page.

What company does Kevin Glass work for?

Kevin Glass works for Sierra Monolithics.

What is Kevin Glass's role at Sierra Monolithics?

Kevin Glass is listed as Principal Engineer and Director at Sierra Monolithics.

What is Kevin Glass's email address?

AeroLeads has found 1 work email signal at @netzero.net for Kevin Glass at Sierra Monolithics.

Where is Kevin Glass based?

Kevin Glass is based in Scottsdale, Arizona, United States while working with Sierra Monolithics.

What companies has Kevin Glass worked for?

Kevin Glass has worked for Sierra Monolithics, Intel_Corporation, and Rockwell Dcd.

How can I contact Kevin Glass?

You can use AeroLeads to view verified contact signals for Kevin Glass at Sierra Monolithics, including work email, phone, and LinkedIn data when available.

What schools did Kevin Glass attend?

Kevin Glass holds Msee, Electical Engineering from Arizona State University.

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