Kevin Sann Email & Phone Number

Lexington, Massachusetts, United States

Sugar Land, Texas, United States

Working on the in-house, highly optimizing C7000 DSP Compiler.

Tucson, Arizona, United States

Projects:1) Z-Die support for Commercial Backlog of BU devices. Wrote Assembly and Test specifications for 106 devices to effect this change across TI subcon's and A/T facilities. Because of this, ~50 million backlogged commercial parts can be made with automotive wafers.2) APL (Accelerated Product Launch), RTM (Release to Market) acceleration for 3 Magnetic Current Sense Amplifiers and their spin devices. Loaded commercial and automotive versions into supply chain software, amounting to 115 total devices.3) Device qualification for 3 Digital Power Monitor family devices. Yield analysis, reliability and stress readpoint testing, and drift analysis using proprietary supercomputing tools. Observed anomalies and sent reports to product management and test engineering for their mitigation in production.4) Auxiliary Support for Product Engineering team:- 2 Assembly and Test specifications for a quad-package version of a Digital Power Monitor- 15 automotive TMCS1123 parts loaded into supply chain software- Trained other engineers on proprietary supercomputing tools for data analysis. Documented methods of modifying, uploading data. Also documented Yield, Drift, Temp Char, and Regression analysis by means of bin/fail paretos, time/histogram/box/scatter plots.

Minneapolis, Minnesota, United States

Responsibilities:1) Interface between researchers and HPC resources 2) Storage, memory management3) Communication of sitewide problems 4) SLURM scheduler - Script creation5) Edge case documentation and service6) Heavy usage of Linux terminal7) Splunk log tracking

12500 Ti Blvd, Dallas Tx

All of the following material was shown to Business Unit leaders and Product, Test, and Validation engineers/managers in a final presentation.Projects:1) Dual Source Powerstage Qualification to meet customer's request and capacity constraint of ~20 million parts/Quarter for 3 Quarters straight. Qualification requirements were met through submitting work orders for engineering samples, then reliability & stress submission and analysis at specific readpoints (e.g. Temp Cycling, Temp Characterization on an ATE, TPI). Caught variations in device performance between facilities via Drift analysis and Temperature Characterization analysis using proprietary supercomputing tools. Fed this data back to Product Engineering Manager and Test Engineering to close anomalous gaps in performance.2) Powerstage Samples Preparation. Created 4 work orders for testing devices at a specific subcon Assembly and Test site.3) Powerstage offload. Created Assembly and Test specifications for an additional subcon and work orders for each of 3 engineering prototypes.4) HTOL Board validation for Powerstages. Used digital multimeters and power supplies to test current consumption through each socket, sending reports to Test Engineering of performance in different voltage and current configurations.