Job description:The main subject is microarchitecture of the next-gen Intel® Core™ CPUs. The primary task is to design hardware-efficient microarchitecture optimizations to improve average CPU performance on modern software applications. CPU benchmarks are used as the representative subset of modern applications. Proposed microarchitecture optimizations are modeled in a cycle-accurate C++ CPU simulator to estimate expected performance growth.Achievements:- Proposed multiple optimizations to Intel Alder Lake microarchitecture and following Intel Core generations- Made 700+ contributions to the CPU simulator- Improved modeling accuracy of the CPU simulator by integrating more realistic methodology of performance averaging - Identified and classified performance bottlenecks for industry-standard CPU benchmarks: SPEC CPU, Geekbench, SYSmark, etc.- Designed 3 Python libraries to track and analyze output of the CPU simulator; this improved efficiency of simulator development substantially- Co-mentored 4 interns, one becoming a CPU architect himself

An organizer and a lecturer of the "MIPT-V" course for the 2nd year MIPT students. Topics of the course:- Architecture & microarchitecture of modern CPUs - the main focus of the course, using RISC-V as ISA.- Cycle-accurate CPU modeling - development of C++ simulator and applying in for CPU performance analysis.- Software development - best known practises for collective development of a software product using the CPU simulator as an example.