Self-directed, computer system architect with comprehensive accomplishments leading central processing unit (CPU) architecture, performance modelling, register-transfer level (RTL) design and cross-functional technical teams to develop innovative, industry-leading systems on a chip (SoC). Known as an innovative thinker with strong in-ordered and out-of-ordered CPU microarchitecture, memory system and machine learning microarchitecture acumen. Recognized for maximizing performance by staying abreast of emerging technologies and leveraging them to pioneer new products. Highly organized, creative problem solver who excels at guiding teams through aggressive timelines. Expertise includes finding effective and creative solutions, system performance modeling and developing highly complex SoC from concept to deployment.Accomplishments:• Raised $600K in seed funding, recruited three employees, devised profitable technologies and created a go-to-market strategy.• Founded and directed innovative technology focused on low latency, high bandwidth and scalable on-chip interconnect products.• Led research and development of system performance simulations and advanced central processing unit (CPU) architectures.• Patented cognitive loudspeaker technologies, a highly scalable and adaptable wireless audio system for sound reproduction applications including surround sound, high fidelity (HiFi) and streaming.• Led architecture development and logic design of proprietary reconfigurable processors. ✉ kit_tam@yahoo.comExpertise:EDA, Embedded Systems, ASIC, IC, FPGA, Mixed Signal, Debugging, Digital Signal Processors, ASIC, Semiconductors, SoC, IC, Machine Learning, Simulations, AI, ARM Architecture, VLSI, Verilog, C++, Python, Perl, CMOS, Chip Architecture, DDR, Neural Networks, CPU design, Performance Modeling, Cache Object Script, Interconnect, High Speed Design, Low-power Design, Verilog-AMS, SystemC, Debuggers, Circuits, Software Patents, Built-ins, Logic BIST
-
Founder And CeoDegirum Corporation Oct 2016 - Oct 2018• Founded and directed innovative technology focused on low latency, high bandwidth and scalable on-chip interconnect products.• Raised $600K in seed funding, recruited three employees, devised profitable technologies and created a go-to-market strategy.• Targeted cloud computing, computer networks and machine learning hardware business verticals.• Filed five patents and developed SystemC simulators related to the on-chip interconnect system and machine learning computing systems for word-vector training.
-
Senior Manager, Cpu DesignMarvell Semiconductor Sep 2010 - Oct 2016Santa Clara, Ca, UsMarvell's breakthrough innovation remains at the heart of the company's storage, processing, networking, security and connectivity solutions. With leading intellectual property and deep system-level knowledge, Marvell's semiconductor solutions continue to transform the enterprise, cloud, automotive, industrial and consumer markets.• Led research and development of system performance simulations and advanced central processing unit (CPU) architectures.• Built a full function CPU simulator for the ARMv7 instruction set architecture (ISA) and delivered in one year a multithreaded, out of order CPU model using the timing-first approach with the Simics and gem5 toolsets.• Developed innovative “Bank Physical Register File Data Flow” CPU architecture by researching system performance and writing new code.• Patented the “banked physical register” file CPU architecture, a simple and scalable multithreaded out of order implementation.• Developed and deployed programable static random-access memory built-in self-test (SRAM BIST) intellectual property. -
Independent EngineerKit Tam Engineering 2009 - 2010• Patented cognitive loudspeaker technologies, a highly scalable and adaptable wireless audio system for sound reproduction applications including surround sound, high fidelity (HiFi) and streaming.• Developed detailed business plan, including funding, distribution and scalability planning.
-
Director Of EngineeringMosys 2001 - 2009San Jose, California, UsMoSys, Inc. (NASDAQ: MOSY) is a fabless semiconductor company enabling leading equipment manufacturers of Cloud, networking, communications, and data center systems to support the continual increase in Internet users, data and services.• Managed technology development, logic design and validation of the company’s intellectual property.• Verified 30+ 1T-SRAM products designed from three generation of technologies from various wafer fabrication plants (FAB).• Applied 1T-SRAM technology to create and patent new and innovative products, including a scalable multiple banks multiple ported memory system, 1T-QDR SRAM and 1T-asynchronous dual-ported SRAM.• Architected and implemented the design-for-test (DFT) functions of 1T-SRAM memory intellectual property products. • Developed and deployed a feature rich dynamic random-access memory built-in self-test and repair (DRAM BIST/BISR) intellectual property product into a high density and high-volume DRAM chip.• Architected and built within six months a test debug system for the embedded-Flash technology team, including design, field programmable gate array (FPGA) programming and Microsoft Windows user interface. -
Acting Director, Engineering And Logic Design ManagerChameleon Integrated Services 2000 - 2001Saint Louis, Mo, UsChameleon Systems designs, markets and sells programmable system-on-a-chip solutions.• Led architecture development and logic design of proprietary reconfigurable processors. • Re-architected the on-chip memory bus to greatly improve the bandwidth and latency with lower power and smaller area.• Reduced bug counts and operating frequency by redesigning non-fabric logic.• Enhanced programmability and inter-chip data communication bandwidth in systems with multiple reconfigurable processors. -
Manager, Senior Logic Design And Design ManagerSun Microsystems 1995 - 2000Palo Alto, Ca, UsSun Microsystems, Inc. is a wholly owned subsidiary of Oracle Corporation. Oracle Corporation, an enterprise software company, engages in the development, manufacture, distribution, servicing, and marketing of database, middleware, and application software worldwide. With the acquisition of Sun Microsystems, Oracle also owns Solaris, Java, MySQL and the Sun line of storage, server and network hardware.Manager, Senior Logic Design• Led 12-member memory unit team through comprehensive redesign of second level cache and reliability and availability (RAS) features in the second tape-out of the UltraSparc III processor. • Managed team to meet aggressive delivery schedule and resolve issues with integrated technical teams.Design Engineer• Led logic design of the UltraSparc III processor instruction unit, including defining micro-architectural specifications of the instruction fetch, instruction cache and branch prediction units and performing logic synthesis, physical design and timing closure.• Identified performance improvement opportunities, including use of gshare and return address stack (RAS).• Delivered chip-level floor plan and the timing closure methodology that brought timing and die size within the taped-out goal. • Collaborated on design and execution of the first silicon. -
Design EngineerMosys, Inc. 1993 - 1995San Jose, California, Us• Led logic design and verification for an innovative memory technology start-up, including the patented propriety multibank double data rate dynamic random-access memory (DDR MDRAM) technologies.• Taped-out the first functional full custom graphic controller chip using application specific integrated circuit (ASIC) methodologies. • Developed graphic controller intellectual property for peripheral component interconnect (PCI) interface and MDRAM controller.
-
Engineer, Logic DesignSun Microsystems 1990 - 1993Palo Alto, Ca, Us• Led logic design for the UltraSparc I processor, including the instruction buffer, computer tracking logic, unit level testbench, floor plan and timing constraints.• Devised the patented next field random-access memory (RAM) instruction fetching scheme to minimize the branch delay penalty.
-
Senior Design EngineerSharp Electronics Corporation Usa 1988 - 1989Montvale, Nj, UsSharp Electronics Corporation is the U.S. subsidiary of Japan’s Sharp Corporation. Sharp is a worldwide developer of one-of-a-kind home appliances, networked multifunction office solutions and professional displays.• Developed a high-performance digital signal processor (DSP) chip optimized for fast Fourier transform (FFT) algorithm.• Architected the instruction set, execution pipeline and the arithmetic logic unit (ALU). -
Design EngineerIntel 1983 - 1986Santa Clara, California, UsIntel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California, in the Silicon Valley.• Designed erasable programmable read-only memory (EPROM) products from metal-oxide semiconductor (CMOS) technology.• Invented CMOS circuits that improved performance of negative channel metal oxide semiconductor (NMOS) implementations.
Kit T. Education Details
-
University Of California, BerkeleyPhysics -
University Of Illinois Urbana-ChampaignElectrical Engineering And Computer Science
Frequently Asked Questions about Kit T.
What is Kit T.'s role at the current company?
Kit T.'s current role is Proven System on Chip Architect: CPU Architecture, Memory System, DDR DRAM Controller, Machine Learning, Neural Networks.
What schools did Kit T. attend?
Kit T. attended University Of California, Berkeley, University Of Illinois Urbana-Champaign.
Free Chrome Extension
Find emails, phones & company data instantly
Aero Online
Your AI prospecting assistant
Select data to include:
0 records × $0.02 per record
Download 750 million emails and 100 million phone numbers
Access emails and phone numbers of over 750 million business users. Instantly download verified profiles using 20+ filters, including location, job title, company, function, and industry.
Start your free trial