Koby Goldberg Email & Phone Number

Holon, Il

Hertzeliya Pituah, Tel Aviv, Israel

• Deployment of AI models with Tensorflow Lite Micro C/C++ runtime engine, running tflite inference on various Neural Processing Units (NPUs) and DSPs, some in-house and some external. • Work closely with the guys that developed the in-house NPU and AI compiler to integrate the HW model and compiler with the SW.• Development of C/C++ code for real-time embedded NPU-Controller cores that are tightly coupled with the NPU, with emphasis on functionality, performance, optimization, and accuracy, while using vendor profilers and cycle-accurate simulators to optimize the performance.• Conduct pre & post silicone NPU validation.• Development automation tools (Python, batch files, JLink & gdb scripts) for running hundreds of AI models and infrastructure tools for analyzing memory usage and performance.

Hertzeliya Pituah, Tel Aviv, Israel

Machine Learning Real Time Development on DSPG's platforms.

Herzliya Area, Israel

Developed real time embedded software for NB-IoT modem and GNSS integration on CEVA's DSP processors. And developed complementary python scripts and GUI applications for increased efficiency of the entire team.

Petah Tikva Area, Israel

Senior Firmware & Software Engineer at Intel's Indoor-Location core group- Developed real time position C/C++ software for various based location technologies, including WiFi (TOF) indoor location navigation, implementing GNSS/INS navigation algorithms using Kalman Filter based Position Engine, including sensor fusion, and map matching.- Developed Matlab validation tools based on Mex infrastructure to guarantee bin exact between the C/C++ software implementation and the Matlab simulation.- Developed Matlab and Python tools for analyzing and visualizing field and simulation logs, including advanced google maps GUI tool to presentation the position and additional layers of data to debug the software and the algorithm performance.

• Member of WCDMA L1 Firmware at the Modem group. Develop and Implement realtime FW modules on a DSP for the Cellular modem, while focusing on Release 7 & 8 features of the 3GPP spec.• Design HLDs and writing Firmware code in C for realtime on a DSP processor while understanding the system requirements (and sometimes influencing the system design) and taking care of concepts such as efficiency, MIPS, Latency, OS timers and interrupts, memories (static & dynamic), HW registers, and interface with HW modules (such as DigRF, AGC HW etc.). Integration with other modules such as CPC HSDPA, CPC HSUPA, and HW modules, and testing on various levels.Design and implementation of the following modules:• CPC State Manager – CPC DTX/DRX state machine• CPC Queue Manager – receiving L1 commands and triggering CPC operation modes• RF Rx Manager – opens the RF and RX path and converging RX Loops for many clients (such as HSDPA manager, HSUPA manager, DPCH manager, Compressed Mode manager, RxDiversity manager, etc.)• RF sequencer – WB layer for running RF sequences on DigRF• AGC – manage AGC HW via FW, including 2-stage AGC for Rel8 requirements.

•R&D, design and implementation of algorithms for hardware units in the field of DSP and communication (Matlab)•High Level implementation in C (Floating & Fixed Point)•Low Level implementation (RTL) in C, similar to Verilog: -Bit Exact -Cycle Based -Pipeline Design•Firmware (Real-time Embedded in C and Assembler)•Cable Communication - PHY Demodulator (DVB-C/J83.b/MOCA): DC compensation, Symbols Interpolator, Reed Solomon Decoder, Descrambler (Randomizer), FFT radix-4, Constellation Slicer, Channel Tracker•Satellite TV Broadcast - PHY Demodulator (DVB-S/DVB-S2/ISDB-S): System Frame Synchronization, Physical Layer Scrambler, Physical Layer Header Decoder, BCH Decoder•Terrestrial TV Broadcast - PHY Demodulator (ATSC):Channel Tracker & Estimator, PLL, NTSC Co-Channel Interference Rejector•Firmware: Demodulator core dataflow, Timing Recovery System, PLL/Course FLL/Fine FLL control & management