Krishnakumar Sridhar Email & Phone Number

Result-oriented ASIC design engineer with 10+ years of experience in ASIC RTL Design and Implementation with a track record of successful Tapeouts of micro controllers and SoCs in technologies from 28nm - 350nm.Technical expertise in front and back-end ASIC design flow from RTL design to floorplanning, Synthesis, Place and Route, Clock tree Synthesis, low power methodology using UPF and Timing closure.Specialities: NVM controller design, RAM and L1 Cache designs, ASIC Design flow from Module IP definition and Product Specification to GDSII. Verifying DRC and LVS checking, architecting APR Methodology, Design Automation and Computer Architecture.

Listed skills include Verilog, Computer Architecture, Cadence Virtuoso, Logic Synthesis, and 27 others.