Expert evaluator and reviewer on:- KDT-JU- ECSEL-JU- ARTEMIS-JU- Horizon 2020 (H2020) - ICT

XTPL is a company developing globally innovative, additive manufacturing technology that enables ultra-precise printing of nanomaterials. Unique XTPL printing system allows for precise deposition of an in-house formulated nanoink on a variety of substrates to obtain conductive & nonconductive structures in size range of 1-5 micrometers.

Thaumatec is Internet of Things System Integrator and Embedded Software and Hardware development service provider, located in Wrocław, Poland. We specialize in embedded software development, embedded hardware design, embedded systems testing, and Internet of Things System Integration. As a service provider we can also provide you with development services for the whole spectrum of IoT technologies including in-cloud applications and big data.

Thaumatec is a very successful technology company delivering superb development services to the international customer base- Built, grew, and ran development teams- Developed sales for the company

The DASH7 Alliance is a non-profit mutual benefit corporation formed to foster the existence and the further development of the DASH7 protocol specification (based on ISO 18000-7). It is the intent of the Alliance to enhance the technology beyond its current capabilities and physical boundaries to enable security, automation and control systems for a multitude of environments. Protocol standard extensions could also be ratified, approved and adopted by one or more established and recognized international or national agencies or bodies as an official national or international standard.

The DASH7 Alliance is a non-profit mutual benefit corporation formed to foster the existence and the further development of the DASH7 protocol specification (based on ISO 18000-7). It is the intent of the Alliance to enhance the technology beyond its current capabilities and physical boundaries to enable security, automation and control systems for a multitude of environments. Protocol standard extensions could also be ratified, approved and adopted by one or more established and recognized international or national agencies or bodies as an official national or international standard.

Secure Systems and Fault-Tolerant Computing graduate class.Wrocław University of Technology (WrUT) is one of the TOP3 Universities of Technology in Poland. It is a modern research university that educates approximately 36000 students and produces approximately 7000 graduates a year. It comprises 4500 employees, half of them academics. The university participates in numerous research projects, produces approximately 4500 research papers a year and collaborates internationally at both European and global levels. Thaumatec partners with WrUT for promoting joint R&D and educational projects in the area of the Internet of Things.

Arynga delivers innovative vehicle software management solutions to the automotive industry. Our flagship product CarSync™, is the most reliable, efficient, and intelligent platform for remotely updating and maintaining vehicle software and firmware. CarSync ensures the integrity of embedded systems for the lifetime of the vehicle, reducing recall rates caused by software glitches, and in effect, saves vehicle Original Equipment manufacturers (OEMs) and Tier One suppliers time and money, while improving customer satisfaction.

Primary research interests in:- computer arithmetic hardware design including residue number system applications to digital signal procesing hardware, instruction-level parallelism- multi/many-core computer architectures: performance modeling and optimization, energy efficiency, multi-core architectures for embedded applications,- thermal modeling, simulation and management of many-cores.- wireless sensor networks,- threshold logic identification, synthesis and technology mapping.Past research interests:- resonant tunneling devices and their applications to digital logic (including threshold and generalized threshold logic),- physical design automation of CMOS VLSI.Most recent publications (2012/2011):1. B. Wojciechowski, K, S. Berezowski, P. Patronik, J. Biernat, Fast and accurate thermal modeling and simulation of manycore processors and workloads, Microelectronics Journal, Sept. 20122. K. S. Berezowski, The Landscape of Wireless Sensing in Greenhouse Monitoring and Control, International Journal of Wireless & Mobile Networks (IJWMN) Vol. 4, No. 4, Aug. 20123. M. Wesolowski, P. Patronik, K. Berezowski and J. Biernat, Design of a Novel Flexible 4-moduli RNS and Reverse Converter, accepted for Irish Signals & Systems Conf., Maynooth, 2012.4. P. Patronik, K. Berezowski, J. Biernat, Stanislaw J. Piestrak & Aviral Shrivastava Design of an RNS Reverse Converter for a New Five-Moduli Special Set, Proc. Great Lakes Symp. on VLSI, 20125. P. Patronik, K. Berezowski, S. J. Piestrak, J. Biernat, A. Shrivastava, Fast and Energy-Efficient Constant-Coefficient FIR Filters Using Residue Number System, Proc. ISLPED 2011, Fukuoka, Japan.6. T. Gowda, S. Vrudhula, N. Kulkarni, K. Berezowski, Identification of Threshold Functions and Synthesis of Threshold Networks, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on , vol.30, no.5, pp.665-677, May 2011

Municipal water leak detection system product design study

Awardee of the Municipality of Wroclaw transfer of knowledge program "Zielony Transfer" http://zielonytransfer.pl. Main areas of interest: sub-1GHz Low Rate Wireless Personal Area Network standards (LR-WPAN) specifically TI SimpliciTI, DASH-7 and ZigBee-900Related paper(s):K. S. Berezowski, The Landscape of Wireless Sensing in Greenhouse Monitoring and Control, International Journal of Wireless & Mobile Networks (IJWMN) Vol. 4, No. 4, Aug. 2012

Marie-Curie Outgoing International Fellowship, Framework Programme 6th,European Commission Human Resource and Mobility, Marie-Curie Actions Project:MOIF-CT-2006-040672 “RESPONS” awarded on Dec. 20th, 2006.Project's schedule:09/01/2009 – 09/01/2010 Institut National Polytechnique de Grenoble, France.09/01/2007 – 09/01/2009 Arizona State University, AZ, USA,Related paper(s):Gowda, T., Vrudhula, S., Kulkarni, N., Berezowski, K.Identification of threshold functions and synthesis of threshold networks(2011) IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 30 (5), art. no. 5752412, pp. 665-677. Leshner, S., Kulkarni, N., Vrudhula, S., Berezowski, K.Design of a robust, high performance standard cell threshold logic family for DSM technology(2010) Proceedings of the International Conference on Microelectronics, ICM, art. no. 5696203, pp. 52-55.

Marie-Curie Outgoing International Fellowship, Framework Programme 6th,European Commission Human Resource and Mobility, Marie-Curie Actions Project:MOIF-CT-2006-040672 “RESPONS” awarded on Dec. 20th, 2006.Project's schedule:09/01/2007 – 09/01/2009 Arizona State University, AZ, USA,09/01/2009 – 09/01/2010 Institut National Polytechnique de Grenoble, France.Related paper(s)Leshner, S., Berezowski, K., Yao, X., Chalivendra, G., Patel, S., Vrudhula, S.A low power, high performance threshold logic-based standard cell multiplier in 65 nm CMOS(2010) Proceedings - IEEE Annual Symposium on VLSI, ISVLSI 2010, art. no. 5572773, pp. 210-215. Mhambrey, S.S., Clark, L.T., Maurya, S.K., Berezowski, K.S.Out-of-order issue logic using sorting networks(2010) Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI, pp. 385-388. Chokshi, R., Berezowski, K.S., Shrivastava, A., Piestrak, S.J.Exploiting residue number system for power-efficient digital signal processing in embedded processors(2009) Embedded Systems Week 2009 - 2009 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES'09, pp. 19-27. Cited 3 times.Rao, R., Vrudhula, S., Berezowski, K.Analytical results for design space exploration of multi-core processors employing thread migration(2008) Proceedings of the International Symposium on Low Power Electronics and Design, pp. 229-232.

Main projects: stock management for the major supermarket network, lab data management for microbiological laboratories

Post-doc in Prof. Sarma B. K. Vrudhula group (NSF Center for Low Power Electronics) on digital logic applications of negative differential resistance devices.Related paper(s):Berezowski, K.S., Vrudhula, S.B.K.Multiple-valued logic circuits design using negative differential resistance devices(2007) Journal of Multiple-Valued Logic and Soft Computing, 13 (4-6), pp. 447-466. Berezowski, K.S., Vrudhula, S.B.K.Multiple-valued logic ciruits design using negative differential resistance devices(2007) Proceedings of The International Symposium on Multiple-Valued Logic, art. no. 4215947, . Berezowski, K.S.Compact binary logic circuits design using negative differential resistance devices(2006) Electronics Letters, 42 (16), pp. 902-903. Cited 11 times.Berezowski, K.S., Vrudhula, S.B.K.Automatic design of binary and multiple-valued logic gates on RTD series(2005) Proceedings - DSD'2005: 8th Euromicro Conference on Digital System Design - Architectures, Methods and Tools, 2005, art. no. 1559791, pp. 139-142. Cited 1 time.