Kumar Ranganathan Email & Phone Number

Bangalore, India

Bangalore, India

Led the development of flexible wearable biosensing devices as well as energy efficient algorithms for data aggregation in IoT wireless sensor networks. This included wearable flexible electronics to power-efficiently measure vital signs on-the-go. Also led the IoT research agenda on power efficient data gathering in spatial sensor networks by using distributed algorithms and circuits (e.g. Compressive Sensing, Machine Learning, Wavelet Transforms, Physics Models, etc.) to exploit… Show more Led the development of flexible wearable biosensing devices as well as energy efficient algorithms for data aggregation in IoT wireless sensor networks. This included wearable flexible electronics to power-efficiently measure vital signs on-the-go. Also led the IoT research agenda on power efficient data gathering in spatial sensor networks by using distributed algorithms and circuits (e.g. Compressive Sensing, Machine Learning, Wavelet Transforms, Physics Models, etc.) to exploit spatio-temporal sensor field sparsity. Show less

Intel Frugal Innovation Research Laboratory, Bangalore, India

Tasked by the CTO of intel to lead the development of affordable and relevant technology and business models for Emerging Markets like India. Led the team that developed the technology behind LifephonePlus that was licensed to BPL and launched in India (https://iq.intel.com/frugal-innovation-brings-healthcare-to-rural-india/). Also evaluated a range of IoT-enabled potential product opportunities for India and similar emerging markets ranging from Agriculture, Energy Management to Transportation.

Systems Research Center, Bangalore India

Co-founder of Intel's Systems Research Center, Bangalore. Led the development of trusted computing system architectures for secure transactions in PC and mobile phones, including trusted execution environments and trusted I/O paths.

Portland, Oregon Area

Led the Vulnerability Analysis team in Intel Labs including side-channel risk analysis. Was also a key contributor to Intel's secure systems research agenda for Trusted Platforms including TPMs, Virtualization & SE Linux and mandatory access control to control information flow within commodity operating systems.

Portland, Oregon Area

Led product management and solution architecture for secure digital content distribution. This led to the licensing of key technology ingredients to Toshiba and Panasonic for audio content protection.

Portland, Oregon Area

Led the development of content protection technology for digital content distribution over the Internet. Also responsible for the technical diligence of related technology acquisitions for Intel Capital (Intel's VC Arm).

Portland, Oregon Area

Led the Performance Analysis and Optimization team for Proshare, Intel's desktop video conferencing product based on the Intel MMX instruction set. Responsible for performance characterization of Audio-video streams and optimization to the hardware. This work resulted in the Intel TeamStation video conferencing product.

Austin, Texas

Member of Motorola's Operating Systems team that collaborated with IBM's TJ Watson Research Center, Hawthorne NY and IBM's Advanced Workstation Division, Austin TX, to port Windows NT to the PowerPC RISC Architecture jointly developed by Motorola, IBM and Apple. This involved adapting the 32-bit Windows design to the big/little endian Power PC architecture, a totally different memory management and interrupt unit.

Portland, Oregon, United States

Kernel engineer for iRMX, 32-bit RTOS that was ultimately sold by Intel to Radisys as the INTime product. Was responsible for the development of the 16-32 bit binary compatibility subsystem as well as the Posix/TCP-IP subsystem.

C1 German (Professional Competency), German, Recipient Of Scholarship For Advanced German Language Course In Hamburg, Germany

M.S., Computer & Systems Engineering, Gpa: 3.8, Recipient Of Scholarship, Tuition Waiver

Activities and Societies: Teaching Assistant for Advanced Computer Architecture and Electrical Circuits. Master's Thesis: Real-time.

Master Of Science - Ms (1 Semester), Electrical Engineering, Gpa: 4.0, Recipient Of Scholarship, Tuition Waiver

Activities and Societies: Teaching Assistant: Control Systems

B.E., Electrical And Electronics Engineering, 1St Class With Distinction, Receipient Of Merit Tuition-Scholarship

Education record

Education record