Graduated from BITS Pilani, Pilani campus, with a Master's in Communication Engineering. I bring experience as a Data Analyst at UST Global. I possess strong expertise in VLSI design, VLSI architecture, digital image processing, and embedded AI, along with proficiency in FPGA, Docker, Python, Verilog, and design tools like Cadence Virtuoso and LTSpice. Additionally, I have a solid understanding of subjects such as digital electronics, analog electronics, and neural networks.