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Williston, VT, US

Managing a team of highly talented engineers in the ASIC design, verification, and layout specialties. Supporting the team and interfacing with customers to ensure projects are completed with high quality and on schedule. Exploring new opportunities to apply ASIC North's talent in support of customer projects.I am also responsible for day to day operations.

Williston, VT, US

Assistant to the Director of Intellectual Property (IP) for the Aerospace & Defense business unit at GlobalFoundries. Responsibilities include coordinating IP development and maintenance teams (schedules, QA procedures, publishing procedures, IP provisioning); working on special projects to develop IP for specific target areas; maintaining an automated.

Armonk, New York, NY, US

• Implemented timing methodology based on IBM’s EinsTimer static timing analyzer, focusing on low power design setup including on/off power supplies and voltage islands. Implemented all PVT setup aspects for statistical.
• Collaborated with methodologists, tool development, and customers to create a tapeout proven 32nm timing flow on schedule and meeting customer requirements.
• Using statistical timing techniques, reduced timing signoff runs from 8 to as few as 2, providing up to a 250% productivity boost.
• Drove improvements to regression testing and toolkit release to reduce time spent by engineers on these activities and improve quality and customer satisfaction.

Armonk, New York, NY, US

• Managed all aspects of enabling customers to successfully design chips in IBM Foundry. Supported over 50 customer tapeouts from 180nm to 45nm.
• Led a multi-company team that defined, developed, qualified and distributed 5 generations of Reference Flows in Cadence and Synopsys with significant state of the art additions for each generation, such as low power.
• Defined IP model requirements to IP providers creating a consistent design kit structure ensuring compatibility with reference flows.
• Created and led an IP publishing team that ported IBM IP to external foundry, developing a quarterly revenue stream of up to $2M while managing customer commitments.
• Offered turnkey digital design services for mixed signal customers creating an additional revenue stream and helping create design wins.

Armonk, New York, NY, US

Enable customers doing mixed-signal designs primarily in IBM SiGe technology. Lead engineer responsible for defining digital library contents, digital and mixed-signal design methodology. Perform design services for customers including RTL synthesis, test insertion, clock synthesis and layout.

Armonk, New York, NY, US

• Member of the initial team that created an IBM ASIC offering for external customers. Grew the business from a concept to an industry-leading $1B in annual revenue.
• Created an automated library generation and validation system able to create and verify synthesis, timing, test and simulation models for 1000 library elements with a total turnaround time of less than a day.
• Sought out and partnered with manufacturing representatives, design centers and EDA companies to provide a rapid bootstrap to the business, acquiring a first customer within 6 months.
• Laid the framework through team leadership, written and verbal communications, and training to grow the organization from 10 people to several hundred.
• Successfully marketed the offering through development of collateral, customer visits, trade show presence and reference designs to ultimately lead the industry in ASIC market share.
• Collaborated with others to create one of the industry’s first IP reuse specs, which enabled significant competitive advantage for the offering.

Armonk, New York, NY, US

Participated in development of a standard cell circuit compiler that automatically generated a layout from an input schematic. I took the underlying algorithms supplied by IBM Research and integrated them into a custom GUI environment used by IBM design teams. With feedback from those teams I made updates to the algorithms to improve resultant.

Bsee, Electrical Engineering

Msee, Electrical Engineering

Education record