Larry Lai

Larry Lai Email and Phone Number

Sr. Principal Design Engineer at Cadence Design Systems @ Cadence Design Systems
Larry Lai's Location
Sunnyvale, California, United States, United States
Larry Lai's Contact Details
About Larry Lai

Over 24 years of experience in architecture and logic implementation at individual, project leadership, and management rolesExpertise in design & analysis of algorithms, data structures, software engineering, computer graphics, logic design, intellectual property, memory system architecture, GPU architecture, and heterogeneous system architectureSpecific experience in compiler design, programming, behavioral modeling, RTL design, logic synthesis, functional / formal verification, static / dynamic timing analysis, DFT / fault grading, and architectural / datasheet specificationLifelong interest in computer graphics and active member of ACM Siggraph. SITN courses include Computer Graphics & Imaging, Interactive Computer Graphics, Image Synthesis, and Design & Analysis of AlgorithmsSilver Distinguished Inventor at Rambus (10+ unique patent filings)

Larry Lai's Current Company Details
Cadence Design Systems

Cadence Design Systems

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Sr. Principal Design Engineer at Cadence Design Systems
Larry Lai Work Experience Details
  • Cadence Design Systems
    Design Architect
    Cadence Design Systems Jul 2021 - Present
    San Jose, California, Us
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  • Cadence Design Systems
    Sr. Principal Design Engineer
    Cadence Design Systems Nov 2017 - Jun 2021
    San Jose, California, Us
    High Speed Serdes Group
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  • Nusemi Inc
    Senior Member Of The Technical Staff
    Nusemi Inc Mar 2017 - Oct 2017
    Mountain View, Ca, Us
    View
  • Rambus
    Technical Director
    Rambus Jul 2013 - Nov 2016
    San Jose, Ca, Us
    • Data Buffer Logic Design Engineer• Design, Verification, and Timing Analysis Engineer for a hybrid LPDDR2 / LPDDR3 device
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  • Rambus
    Senior Principal Engineer, System Architect
    Rambus Jan 2011 - Jul 2013
    San Jose, Ca, Us
    • Development of a new class of GPU based solutions targeting the heterogeneous computing market• Technical evaluation of Imagination’s Caustic Graphics architecture
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  • Rambus
    Senior Principal Engineer
    Rambus Oct 1992 - Jan 2011
    San Jose, Ca, Us
    • Sole logic design engineer for the Mobile XDR DRAM• Lead a team of 5 logic and verification engineers. Responsible for the design, synthesis, verification, and timing analysis of the XDR DRAM used in products including Sony’s PlayStation 3. Over 127 million units shipped• Developed Rebus, a 25K line program that implemented a new language used to interface with the HP83000 / HP93000 testers to automate characterization of memory and ASIC devices. Program was widely used within and outside the company• Logic design, verification, timing analysis, and test engineer for the Direct Rambus DRAM. This product was used as PC memory, in Sony’s PlayStation 2, and other products. Over 500 million units shipped• Sole logic, verification, and timing analysis engineer for the 18Mb generation Base Rambus DRAM. This product was used in the Nintendo 64 game console. Over 65 million units shipped• Verification engineer for the 4.5Mb generation Rambus DRAM• Member of the Rambus Patent Council
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  • Apple
    Member Of Technical Staff
    Apple May 1988 - Oct 1992
    Cupertino, California, Us
    • • Implementation of a memory / graphics controller design for Power PC based Mac computers•• Verification engineer for numerous projects within the ASIC group•• System Administrator for Solaris Workstations
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Larry Lai Skills

Verilog System Architecture Logic Design Computer Architecture Hardware Architecture C Eda Perl Simulations Formal Verification Rtl Design Asic Semiconductors Rtl Opengl Ddr Ic Software Engineering Flex Bison Powermill Irsim Objective C Assembly Language Lisp Pascal

Larry Lai Education Details

  • University Of Michigan - Rackham Graduate School
    University Of Michigan - Rackham Graduate School
    Computer Engineering
  • University Of Michigan
    University Of Michigan
    Computer Engineering
  • Stanford University
    Stanford University

Frequently Asked Questions about Larry Lai

What company does Larry Lai work for?

Larry Lai works for Cadence Design Systems

What is Larry Lai's role at the current company?

Larry Lai's current role is Sr. Principal Design Engineer at Cadence Design Systems.

What is Larry Lai's email address?

Larry Lai's email address is la****@****bus.com

What is Larry Lai's direct phone number?

Larry Lai's direct phone number is +140893*****

What schools did Larry Lai attend?

Larry Lai attended University Of Michigan - Rackham Graduate School, University Of Michigan, Stanford University.

What are some of Larry Lai's interests?

Larry Lai has interest in Science And Technology, Environment, Education, Children.

What skills is Larry Lai known for?

Larry Lai has skills like Verilog, System Architecture, Logic Design, Computer Architecture, Hardware Architecture, C, Eda, Perl, Simulations, Formal Verification, Rtl Design, Asic.

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