Chris Lavin Email & Phone Number

Longmont, Colorado, United States

Longmont, Colorado, United States

San Francisco Bay Area

San Jose, Ca

Santa Clara, Ca

Over 3 years experience in the architecture team of an innovative semiconductor startup. Involved in several cross-functional efforts such as: • Coordinated architecture model and infrastructure updates to support coherent abstractions across hardware, software and manufacturing teams • Optimized a Java and Haskell architecture flow by reducing runtime by 10X and memory footprint by 5X, enabling rapid and accurate deployment of architecture models to Tabula’s software team • Demonstrated an innovative, patent-able approach to FPGA path delay characterization (launch and capture) to more than double existing coverage of user paths to >95% and detected broken assumptions to tape-out validation • Implemented and managed the architectural infrastructure used in validating chip assembly and integration of a >4 billion transistor FPGA • Developed and maintained automated, complex regressions to validate architecture compatibility across several tools used throughout multiple teams

Provo, Utah Area

Project lead of research involving FPGA CAD tools and security. Developed and demonstrated a rapid FPGA compilation flow and implemented tools such as placers and routers for Xilinx architectures. Developed and maintained an open source FPGA CAD tool framework for Xilinx FPGAs (http://rapidsmith.sourceforge.net). Discovered and manipulated intimate architectural details and routing structures of Xilinx FPGAs.

Provo, Utah Area

Implemented key DSP components (Viterbi trellis decoder, timing and channel estimation recovery, filtering) and managed a multi-FPGA integration of an experimental telemetry receiver in VHDL and Xilinx System Generator. Additionally, a successful real-time re-implementation using a multi-GPU system of both transmitter and receiver was created using NVIDIA's CUDA.

Phd, Electrical Engineering

Activities and Societies: NSF Center for High-performance REconfigurable Computing (CHREC)Studied topics among configurable computing.

Bs, Computer Engineering

Activities and Societies: Golden Key International Honour Society, The Honor Society of Phi Kappa Phi, Eta Kappa Nu - Zeta Eta Chapter