Pre-silicon digital design verification of the next generation display subsystems in the Snapdragon System-On-Chip product family- Developed work breakdown and schedule for the verification of a new protocol to be supported by the latest version of the Display Serial Interface controller for a team composed of myself and two colleagues- Given ownership of system-level testing of a VESA standard compression block implemented by third-party contractors in a recent high-tier product; o Developing use-cases and a system-level test-plan o Creating, debugging, and closing tests and functional coverage based on the test-plan o Working with internal and external colleagues to debug issues o The block was fully verified and integrated on schedule, now involved in supporting the post-silicon teams in their verification- Received the Qualcomm Qualstar Recognition Award for developing andmaintaining the code coverage flow used by the Display team for all projects; the program, written in Perl, collects code coverage data generated by Urg from several regressions, amalgamates and collates results on a per module basis, and presents the data in a web-page

- Initially responsible for the execution and maintenance of hardware co-simulation regressions- Responsible for FPGA and silicon verification of the Display Serial Interface of the Display Sub-system; developing test APIs, supporting verification efforts of a remote team, developing timelines for verification completion

- Researched and developed a secure wireless user authentication server on a UNIX platform- Wrote technical report that illustrates how the system works, the possible applications, and proposed next steps