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Leneesh Raghavan is listed as Principal IC Design at EnSilica, based in Greater Oxford Area, United Kingdom. AeroLeads shows a matched LinkedIn profile for Leneesh Raghavan.
Leneesh Raghavan previously worked as Senior Staff Engineer Analog Design at Infineon Ag and SMTS II at Rambus. Leneesh Raghavan holds M-Tech, Vlsi from National Institute Of Technology Warangal.
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Leneesh Raghavan is a Principal IC Design at EnSilica.
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Oxford, England, United Kingdom
High Slew Rate Programmable output voltage with different duty cycle Regulator.Chopped Current feedback instrumentation amplifier with ripple reduction loop used in Capacitive Sensing.Chopped bandgap reference with notch filter to reduce the mismatch in FINFET technology
Austria
Automotive Sensor Analog frontend designPreamplifiers, Programmable gain amplifiers, Chopping techniquesRipple Reduction loopPower management and ADC designfor automotive application
Bangalore
Self biased high speed PLL for PCIE/XIO system, Analog and digital Duty cycle corrector
Bangalore
Phase locked Loop design
Bangalore
Analog frontend design for video chipfully differential capacitor based programmable gain amplifier, High PSRR Bandgap Reference, DC-DC switching regulator as intern project
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Leneesh Raghavan works for EnSilica.
Leneesh Raghavan is listed as Principal IC Design at EnSilica.
Leneesh Raghavan is based in Greater Oxford Area, United Kingdom while working with EnSilica.
Leneesh Raghavan has worked for Ensilica, Infineon Ag, Rambus, Sanyo Lsi, and Umsl.
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Leneesh Raghavan holds M-Tech, Vlsi from National Institute Of Technology Warangal.
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