Jan 2024 - Present
Who is Wei Han? Overview
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Quick answer
Wei Han is listed as Building AI chips at Meta, based in Sunnyvale, California, United States. AeroLeads shows a work email signal at qualcomm.com and a matched LinkedIn profile for Wei Han.
Wei Han previously worked as ASIC Design Engineer at Meta and System-on-Chip Design Engineer at Cruise. Wei Han holds Phd, Multi-Core Processor Architecture For Wireless Communication from The University Of Edinburgh.
Company email context
Email format at Meta
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{first_initial}{last}@qualcomm.com
86% confidence
AeroLeads found 1 current-domain work email signal for Wei Han. Compare company email patterns before reaching out.
Profile bio
About Wei Han
15+ years industry and academic experience on Digital IC design and Embedded programming Specialties: Machine learning accelerator, Low power IC design, Wireless Communication Baseband (e.g. GERAN, CDMA1x, EVDO and Wi-Fi/WiMAX), Multi-core processor architecture, Reconfigurable computing, Embedded System, Verilog, SystemVerilog, SystemC, C, ASM, C++, Perl, Tcl, Spyglass Lint, CDC, Synthesis, Power analysis, STA, Formal Verification, P&R, Layout design, Sign-off check
Listed skills include Asic, Rtl Design, Soc, Low Power Design, and 34 others.
Current workplace
Wei Han's current company
Company context helps verify the profile and gives searchers a useful next step.
9 roles
Wei Han work experience
A career timeline built from the work history available for this profile.
Aug 2023 - Jan 2024
Principal Engineer
Zeku Technologies (Oppo)
5G Modem Hardware Architecture Design
Jul 2021 - Jul 2023
Jun 2019 - Jul 2021
Senior Staff Engineer
1. Front-end ASIC design, verification and integration for Bluetooth in IoT devices 2. Front-end ASIC design, verification, validation, synthesis, power analysis and optimization for GERAN Equalizer block, GERAN Viterbi block and CDMA 1X Demodulation block3. Power analysis and optimization at Modem top & hard macro level for varied technologies and.
Jul 2011 - May 2019
Postdoctoral Research Fellow
1. Designed a low power DSP accelerator chip for mobile digital health like epilepsy detection 2. Successfully made this chip typed-out and tested the chip after returned by the foundry
Jan 2010 - Apr 2011
Contract Design Engineer
1. Developed Wi-Fi hardware solutions for GPS development boards 2. Designed AGPS software solution on Windows Mobile based PDAs
Oct 2008 - May 2009
Ic Design Engineer
1. Designed a FFT block for Wi-Fi physical layer from implementing algorithm in Matlab to logic synthesis2. Verified WAPI encryption IP and integrated it into Wi-Fi SoC chip3. Verified Wi-Fi SoC chip for the MAC protocols
Feb 2005 - Sep 2005
Layout Design Engineer
1. Designed and verified the layout of standard cell libraries and SRAM blocks in various technologies 2. Designed and simulated digital circuits for standard cell libraries
Jul 2001 - Jan 2003
2 education records
Wei Han education
Phd, Multi-Core Processor Architecture For Wireless Communication
The University Of Edinburgh
Master By Research, Low Power Asic Design
The University Of Edinburgh
FAQ
Frequently asked questions about Wei Han
Quick answers generated from the profile data available on this page.
What company does Wei Han work for?
Wei Han works for Meta.
What is Wei Han's role at Meta?
Wei Han is listed as Building AI chips at Meta.
What is Wei Han's email address?
AeroLeads has found 1 work email signal at @qualcomm.com for Wei Han at Meta.
Where is Wei Han based?
Wei Han is based in Sunnyvale, California, United States while working with Meta.
What companies has Wei Han worked for?
Wei Han has worked for Meta, Cruise, Zeku Technologies (Oppo), Alibaba Group, and Qualcomm.
How can I contact Wei Han?
You can use AeroLeads to view verified contact signals for Wei Han at Meta, including work email, phone, and LinkedIn data when available.
What schools did Wei Han attend?
Wei Han holds Phd, Multi-Core Processor Architecture For Wireless Communication from The University Of Edinburgh.
What skills is Wei Han known for?
Wei Han is listed with skills including Asic, Rtl Design, Soc, Low Power Design, Digital Signal Processing, Internet Of Things, Digital Communication, and Spyglass.
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