Project Leader Engineer
CurrentPlanning for 180nm PMIC & 90nm / 110nm CMOS image sensor of platform development and new product tape-out.-> Develop and optimize the 0.18um PMIC platform achieving products monthly output to 5-8K wafer.-> Optimize the 0.11um CMOS of BSI platform in pi-run status yield meet target (>80%).-> Verification and definition of the design rule manual & mask production datasheet & mask grade specification to ensure processes for NTO tape-out.-> Analyzed WAT electrical and CP/FT data with others correlation factor to reorganize and modify process for troubleshooting.-> In charge of project development and new product improvement to ensure the project on schedule.-> Coordinate with customer and cooperate internal to establish platform development.-> Finding factors that affect the yield to draft the preventive plans and improvements.