Digital logic designs, CMOS logic designs, Digital Integrated circuits, Digital electronics, Analog VLSI designs ,Low power VLSI designs, Verilog HDLs, VHDL, Xilinx ISE simulator, modelSim, Cadence virtuoso (UMC 180nm, 90nm and 65nm technology and TSMC 180nm technology) basics of mentor graphics, Keil, basics of microcontrollers.I have an extensive background on Cadence virtuoso UMC and TSMC 180nm technology and my M.Tech (VLSI Design) thesis on the topic "Design and Implementation of high performance CMOS Current Comparator for ADC Applications" in cadence virtuoso UMC 180nm technology, which is an institute standard technology. I have made layout with no DRC errors and LVS is matched. Written a research paper on this topic, which is under review process in Springer journal