Lin Cheng Email & Phone Number

United States

Saxonburg, Pennsylvania, Us

• Technical project lead on semiconductor lasers & photo-detectors (used in optical communications and optical sensing for consumer electronics ) for technology roadmap, technology integration, qualification plan, yield improvement, cost reduction and manufacturing ramp alignment.• Chair weekly yield improvement meeting including R&D team, manufacturing team, process team, product engineering team and testing team to present multiple products’ yield trend, yield loss pareto analysis, progress improvement updates, key road blocks for the overall containment/improvement status, implementation schedule of projects and improvement targets. Achieved all-time high cumulative yield in wafer Fab history .• Utilize statistical analysis tool (JMP) for quick yield trend update, accurate root cause identification and robust corrective actions implementation by working with cross-functional teams.• Lead global teams (China and Malaysia ) to build up system /data architecture , train oversea- staff (10+) and transfer core programs from USA to China• Provide quality support to the manufacturing operations . Establish collaborative relationships with internal and external customers to ensure all quality and compliance matters are addressed in an open and timely manner• Set up and implemented real time visual inspection specification/data collecting system at key process steps for process excursion monitor and immediate root cause identification• Played key role in landing $410 million business with world’s biggest tech company in Q1 2022 by passing new product qualification

San Jose, Ca, Us

• Owned the magnetic head related failure analysis & characterization for various high-volume production products. Performed root cause analysis, worked with design team for the performance impact evaluation, communicated with Product Engineer (PE), wafer fab planning and QA teams for the business impact assessment, led module process engineers to cut in the corrective actions and implement process optimization for factory-wide visual defect reduction resulting in 15x Defective Parts Per Million (DPPM) improvement in less than one year, and tracked back-end proper magnetic reliability performance for resolution confirmation.• Analyzed field returned parts and implemented corrective actions to ensure customer satisfaction.• Led back-end slider fab failure analysis & characterization and performed reliability data mining and analysis. Worked with global teams in US, Thailand, and Philippines on key roadblocks for the overall containment/improvement status and implementation schedule of projects, process/tool change qualification and improvement targets. Established reliability testing requirement with clear definitions of the expected impact. • Championed cross-functional teams (Photolithography, Chemical Mechanical Planarization (CMP), Reticle Design, Thin-film deposition, and Plating) to implement wafer edge (exclusion zone) process margin improvements that resulted in 10% wafer device yield increase for various generations of products.

San Jose, Ca, Us

• Developed and delivered new product (clock head) within 2 months resulting in $2 million cost savings. Worked with design team to review product spec, led production team to define process requirements and integrate key process development, set up process flow/script/attribute/recipe, worked with document control to ensure accurate transfer to wafer fab production control system, participated in initial mask design and reviewed plot drawings and conformance to design objective, started prototype wafers, performed failure analysis and implemented corrective actions. • Led cross-functional teams (Reticle Design, Metrology and Probing) to implement Extreme Density Pico (EDP) on high volume production products for 10% total wafer die number increase, resulting in $5 million cost saving.• Developed and integrated frame trench process to completely fix slider fab alumina cracking/peeling off issue that resulted in 60% slider fab mechanical yield losses reduction.• Reduced production cycle time by 10% by developing and implementing a new prefab probe process.• Designed and maintained automatic wafer tracking program to ensure on-time delivery of new head development wafers efficiently and accurately.

• Integrated new technologies for next generation products during R &D, NPI and high-volume production phases. Increased wafer device yield from 15% to 99% for maverick 40 GB program. Coordinated numerous successful transfers and introduction of the new products from R & D to manufacturing. • Created and maintained wafer data summary database for NPI / R&D leading development wafers including all critical wafer processing, electrical, magnetic parameters and backend slider fab QST/DET data.• Supported wafer Fab 24/7 and perform quick corrective actions in a time of crisis.

Professional Certificates, Stanford Advanced Project Management, Advanced Project Management

Master Of Engineering (M.Eng.), Materials Science & Engineering

Master Of Science (M.S.), Computer Science

Bachelor Of Science (B.S.), Materials Science And Engineering