I am a part-time Phd student researching High-Level Synthesis, in the past I have also worked on many industry sponsored FPGA and embedded systems projects.(2011-2019) Research in High-Level Synthesis, hardware generation (Java/VHDL)* Compiler sofware architecture* IR/Class structure* Linting* In-compiler simulation* Unit tests* Codesign Research(2011-2012) Nano-microscope controller (distributed system) update tool* Add firmware update abstraction (Forth)* Prototype ui (TCL)* .Net based ui (C#)(2011-2016) Teacher's Assistant (Ran/supervised Engineering Labs)* Hardware Design in VHDL (ECE378/3710, 8 semesters)* Electrical Circuits (ECE276, 1 semester)* Microcontrollers in C (ECE480, 1 semester)(2012) Microscope SPI driver* SPI hardware (VHDL)* Add forth spi driver abstraction (Forth)(2012-2019) Research Lab Supervisor* Defacto advisor to Phd, Master's, and undergraduate students(2013-2015) Nano-Microscope Controller, Forth processor* Initial hardware prototype design (VHDL)* Sofware base processor simulation (Java)** Ethernet hardware emulation** System design** Peripheral emulation** Full system interface test, could boot and talk through simulated enet port** Runtime system compile for initial OS* Hardware simulation** Peripheral emulation (VHDL)* System firmware (Forth)** Test in simulation while processor designed** Add hardware supervised cooperative task management** Design lightweight Forth abstraction to processor instructions(2014) Capacitive Touch Prototyping for automotive switch* Firmware (C)(2015) Hearing impaired alarm clock with wireless devices* Firmware (C)* Prototyping (C)(2016) Baremetal ARM USB 2.0 Host integration for microphone* Integrate 3rd party USB Host (C)(2018) Nano-Microscope Controller faster scanning* Add cached interface abstraction to vhdl based hardware (VHDL)* Add simulations for testing basic scans (VHDL)

I designd drive-by-wire system firmware and supporting testing frameworks, while also working with ROS for autonomous vehicle demonstrations.(2015-2016) Amazon Picking Challenge (APC) (ROS/C++/Python) * Perception (PCL/OpenCV) * Pick Sequencing * System Integration(2015-2016) Biolytic Valve Driver * Firmware / FPGA System design lead (C/VHDL) * Test Framework (Linux/C++) * Labview Driver (C) * Encrypted ethernet communcation to PC (C/OpenSSL)(2017-2019) Drive-by-wire Firmware * Multi-vehicle/Module System Architecture (C/C++) * Designed ROS SIL/EOL Testing infrastructure (ROS/C++/Python) * Multiple Vehicle integrations (C/C++) * * Brake * * Throttle(2017-2019) Various other projects (ROS/C++) * Camera Drivers * Test Framwork (Rostest) * System Integration

Worked on VxWorks Firmware Transition to 6.6 SMP and corresponding PLC Performance Testing

Developed 3-D Part Scanning/Analysis Application and integrated line scan Camera for startup.

Diagnostic testing, product documentation, software development in C++.